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/external/clang/test/CodeGen/
Dbitfield-2.c24 int f0_load(struct s0 *a0) { in f0_load() argument
26 return a0->f0; in f0_load()
28 int f0_store(struct s0 *a0) { in f0_store() argument
29 return (a0->f0 = 1); in f0_store()
31 int f0_reload(struct s0 *a0) { in f0_reload() argument
32 return (a0->f0 += 1); in f0_reload()
70 int f1_load(struct s1 *a0) { in f1_load() argument
72 return a0->f1; in f1_load()
74 int f1_store(struct s1 *a0) { in f1_store() argument
75 return (a0->f1 = 1234); in f1_store()
[all …]
Darm-vector-arguments.c13 int8x16x2_t f0(int8x16_t a0, int8x16_t a1) { in f0() argument
14 return vzipq_s8(a0, a1); in f0()
25 T_float32x2 f1_0(T_float32x2 a0) { return a0; } in f1_0() argument
27 T_float32x4 f1_1(T_float32x4 a0) { return a0; } in f1_1() argument
29 T_float32x8 f1_2(T_float32x8 a0) { return a0; } in f1_2() argument
31 T_float32x16 f1_3(T_float32x16 a0) { return a0; } in f1_3() argument
/external/v8/test/cctest/
Dtest-disasm-mips64.cc99 COMPARE(addu(a0, a1, a2), in TEST()
101 COMPARE(daddu(a0, a1, a2), in TEST()
112 COMPARE(subu(a0, a1, a2), in TEST()
114 COMPARE(dsubu(a0, a1, a2), in TEST()
126 COMPARE(mult(a0, a1), in TEST()
128 COMPARE(dmult(a0, a1), in TEST()
139 COMPARE(multu(a0, a1), in TEST()
141 COMPARE(dmultu(a0, a1), in TEST()
152 COMPARE(div(a0, a1), in TEST()
158 COMPARE(ddiv(a0, a1), in TEST()
[all …]
Dtest-disasm-mips.cc99 COMPARE(addu(a0, a1, a2), in TEST()
106 COMPARE(subu(a0, a1, a2), in TEST()
114 COMPARE(mult(a0, a1), in TEST()
121 COMPARE(multu(a0, a1), in TEST()
128 COMPARE(div(a0, a1), in TEST()
135 COMPARE(divu(a0, a1), in TEST()
143 COMPARE(mul(a0, a1, a2), in TEST()
151 COMPARE(mul(a0, a1, a2), in TEST()
153 COMPARE(muh(a0, a1, a2), in TEST()
159 COMPARE(mul(v0, v1, a0), in TEST()
[all …]
Dtest-assembler-mips64.cc58 __ addu(v0, a0, a1); in TEST()
82 __ mov(a1, a0); in TEST()
224 __ Movn(a0, a7, a4); // Move a0<-a7 (a4 is NOT 0). in TEST()
225 __ Ins(a0, a5, 12, 8); // 0x7ff34fff in TEST()
226 __ Branch(&error, ne, a0, Operand(0x7ff34fff)); in TEST()
227 __ Movz(a0, t2, t3); // a0 not updated (t3 is NOT 0). in TEST()
228 __ Ext(a1, a0, 8, 12); // 0x34f in TEST()
230 __ Movz(a0, t2, v1); // a0<-t2, v0 is 0, from 8 instr back. in TEST()
231 __ Branch(&error, ne, a0, Operand(t2)); in TEST()
283 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); in TEST()
[all …]
Dtest-assembler-mips.cc58 __ addu(v0, a0, a1); in TEST()
81 __ mov(a1, a0); in TEST()
214 __ Movn(a0, t3, t0); // Move a0<-t3 (t0 is NOT 0). in TEST()
215 __ Ins(a0, t1, 12, 8); // 0x7ff34fff in TEST()
216 __ Branch(&error, ne, a0, Operand(0x7ff34fff)); in TEST()
217 __ Movz(a0, t6, t7); // a0 not updated (t7 is NOT 0). in TEST()
218 __ Ext(a1, a0, 8, 12); // 0x34f in TEST()
220 __ Movz(a0, t6, v1); // a0<-t6, v0 is 0, from 8 instr back. in TEST()
221 __ Branch(&error, ne, a0, Operand(t6)); in TEST()
271 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); in TEST()
[all …]
/external/v8/src/mips/
Dregexp-macro-assembler-mips.cc155 __ lw(a0, register_location(reg)); in AdvanceRegister()
156 __ Addu(a0, a0, Operand(by)); in AdvanceRegister()
157 __ sw(a0, register_location(reg)); in AdvanceRegister()
165 Pop(a0); in Backtrack()
166 __ Addu(a0, a0, code_pointer()); in Backtrack()
167 __ Jump(a0); in Backtrack()
189 __ lw(a0, MemOperand(frame_pointer(), kStartIndex)); in CheckAtStart()
190 BranchOrBacktrack(&not_at_start, ne, a0, Operand(zero_reg)); in CheckAtStart()
194 __ Addu(a0, end_of_input_address(), Operand(current_input_offset())); in CheckAtStart()
195 BranchOrBacktrack(on_at_start, eq, a0, Operand(a1)); in CheckAtStart()
[all …]
Dbuiltins-mips.cc50 __ Addu(s0, a0, num_extra_args + 1); in Generate_Adaptor()
168 __ Branch(&no_arguments, eq, a0, Operand(zero_reg)); in Generate_StringConstructCode()
170 __ Subu(a0, a0, Operand(1)); in Generate_StringConstructCode()
171 __ sll(a0, a0, kPointerSizeLog2); in Generate_StringConstructCode()
172 __ Addu(sp, a0, sp); in Generate_StringConstructCode()
173 __ lw(a0, MemOperand(sp)); in Generate_StringConstructCode()
179 __ LookupNumberStringCache(a0, // Input. in Generate_StringConstructCode()
230 __ JumpIfSmi(a0, &convert_argument); in Generate_StringConstructCode()
233 __ lw(a2, FieldMemOperand(a0, HeapObject::kMapOffset)); in Generate_StringConstructCode()
238 __ mov(argument, a0); in Generate_StringConstructCode()
[all …]
/external/v8/src/mips64/
Dregexp-macro-assembler-mips64.cc191 __ ld(a0, register_location(reg)); in AdvanceRegister()
192 __ Daddu(a0, a0, Operand(by)); in AdvanceRegister()
193 __ sd(a0, register_location(reg)); in AdvanceRegister()
201 Pop(a0); in Backtrack()
202 __ Daddu(a0, a0, code_pointer()); in Backtrack()
203 __ Jump(a0); in Backtrack()
225 __ lw(a0, MemOperand(frame_pointer(), kStartIndex)); in CheckAtStart()
226 BranchOrBacktrack(&not_at_start, ne, a0, Operand(zero_reg)); in CheckAtStart()
230 __ Daddu(a0, end_of_input_address(), Operand(current_input_offset())); in CheckAtStart()
231 BranchOrBacktrack(on_at_start, eq, a0, Operand(a1)); in CheckAtStart()
[all …]
Dbuiltins-mips64.cc49 __ Daddu(s0, a0, num_extra_args + 1); in Generate_Adaptor()
167 __ Branch(&no_arguments, eq, a0, Operand(zero_reg)); in Generate_StringConstructCode()
169 __ Dsubu(a0, a0, Operand(1)); in Generate_StringConstructCode()
170 __ dsll(a0, a0, kPointerSizeLog2); in Generate_StringConstructCode()
171 __ Daddu(sp, a0, sp); in Generate_StringConstructCode()
172 __ ld(a0, MemOperand(sp)); in Generate_StringConstructCode()
178 __ LookupNumberStringCache(a0, // Input. in Generate_StringConstructCode()
229 __ JumpIfSmi(a0, &convert_argument); in Generate_StringConstructCode()
232 __ ld(a2, FieldMemOperand(a0, HeapObject::kMapOffset)); in Generate_StringConstructCode()
237 __ mov(argument, a0); in Generate_StringConstructCode()
[all …]
/external/llvm/test/CodeGen/Mips/
Dmips64shift.ll3 define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
6 %shl = shl i64 %a0, %a1
10 define i64 @f1(i64 %a0, i64 %a1) nounwind readnone {
13 %shr = ashr i64 %a0, %a1
17 define i64 @f2(i64 %a0, i64 %a1) nounwind readnone {
20 %shr = lshr i64 %a0, %a1
24 define i64 @f3(i64 %a0) nounwind readnone {
27 %shl = shl i64 %a0, 10
31 define i64 @f4(i64 %a0) nounwind readnone {
34 %shr = ashr i64 %a0, 10
[all …]
Ddsp-r1.ll3 define i32 @test__builtin_mips_extr_w1(i32 %i0, i32, i64 %a0) nounwind {
7 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 15)
13 define i32 @test__builtin_mips_extr_w2(i32 %i0, i32, i64 %a0, i32 %a1) nounwind {
17 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 %a1)
21 define i32 @test__builtin_mips_extr_r_w1(i32 %i0, i32, i64 %a0) nounwind {
25 %1 = tail call i32 @llvm.mips.extr.r.w(i64 %a0, i32 15)
31 define i32 @test__builtin_mips_extr_s_h1(i32 %i0, i32, i64 %a0, i32 %a1) nounwind {
35 %1 = tail call i32 @llvm.mips.extr.s.h(i64 %a0, i32 %a1)
41 define i32 @test__builtin_mips_extr_rs_w1(i32 %i0, i32, i64 %a0) nounwind {
45 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 15)
[all …]
/external/clang/test/CodeGenObjC/
Dproperty-complex.m12 -(void) setIm0: (_Complex float) a0;
27 -(void) setIm0: (_Complex float) a0 {
28 printf("setIm0: %.2f + %.2fi\n", __real a0, __imag a0);
29 iv0 = a0 + (.3 + .4i);
36 -(void) setP0: (_Complex float) a0 {
37 printf("setP0: %.2f + %.2fi\n", __real a0, __imag a0);
38 iv0 = a0 + (.7 + .8i);
42 void f0(I0 *a0) {
43 float l0 = __real a0.im0;
44 float l1 = __imag a0->iv0;
[all …]
/external/llvm/test/CodeGen/X86/
Dxop-intrinsics-x86_64.ll3 define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %…
5 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double>…
8 define <2 x double> @test_int_x86_xop_vpermil2pd_mr(<2 x double> %a0, <2 x double>* %a1, <2 x doubl…
12 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %vec, <2 x double…
15 define <2 x double> @test_int_x86_xop_vpermil2pd_rm(<2 x double> %a0, <2 x double> %a1, <2 x double…
19 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double>…
24 define <4 x double> @test_int_x86_xop_vpermil2pd_256(<4 x double> %a0, <4 x double> %a1, <4 x doubl…
27 …%res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x dou…
30 define <4 x double> @test_int_x86_xop_vpermil2pd_256_mr(<4 x double> %a0, <4 x double>* %a1, <4 x d…
35 …%res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %vec, <4 x do…
[all …]
Dsse-intrinsics-x86.ll3 define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) {
5 …%res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#u…
11 define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) {
13 …%res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float…
19 define <4 x float> @test_x86_sse_cmp_ss(<4 x float> %a0, <4 x float> %a1) {
21 …%res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float…
27 define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1) {
31 %res = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
37 define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) {
41 %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
[all …]
Dsse2-intrinsics-x86.ll3 define <2 x double> @test_x86_sse2_add_sd(<2 x double> %a0, <2 x double> %a1) {
5 …%res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>…
11 define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) {
13 …%res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d…
19 define <2 x double> @test_x86_sse2_cmp_sd(<2 x double> %a0, <2 x double> %a1) {
21 …%res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d…
27 define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1) {
31 %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
37 define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) {
41 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
[all …]
Dsse41-intrinsics-x86.ll3 define <2 x double> @test_x86_sse41_blendpd(<2 x double> %a0, <2 x double> %a1) {
5 …%res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x…
11 define <4 x float> @test_x86_sse41_blendps(<4 x float> %a0, <4 x float> %a1) {
13 …%res = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x fl…
19 define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
21 …%res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double>…
27 define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
29 …%res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2…
35 define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) {
37 …%res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x do…
[all …]
Davx2-intrinsics-x86.ll3 define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) {
5 …%res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses…
11 define <32 x i8> @test_x86_avx2_packsswb(<16 x i16> %a0, <16 x i16> %a1) {
13 …%res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
19 define <32 x i8> @test_x86_avx2_packuswb(<16 x i16> %a0, <16 x i16> %a1) {
21 …%res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
27 define <32 x i8> @test_x86_avx2_padds_b(<32 x i8> %a0, <32 x i8> %a1) {
29 %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1]
35 define <16 x i16> @test_x86_avx2_padds_w(<16 x i16> %a0, <16 x i16> %a1) {
37 …%res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#use…
[all …]
Dcombine-sse41-intrinsics.ll4 define <2 x double> @test_x86_sse41_blend_pd(<2 x double> %a0, <2 x double> %a1) {
5 %1 = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 0)
13 define <4 x float> @test_x86_sse41_blend_ps(<4 x float> %a0, <4 x float> %a1) {
14 %1 = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i32 0)
22 define <2 x double> @test_x86_sse41_blendv_pd(<2 x double> %a0, <2 x double> %a1) {
23 …%1 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> z…
31 define <4 x float> @test_x86_sse41_blendv_ps(<4 x float> %a0, <4 x float> %a1) {
32 …%1 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroi…
40 define <16 x i8> @test_x86_sse41_pblendv_b(<16 x i8> %a0, <16 x i8> %a1) {
41 …%1 = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> zeroinitializ…
[all …]
Dcombine-avx-intrinsics.ll4 define <4 x double> @test_x86_avx_blend_pd_256(<4 x double> %a0) {
5 %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a0, i32 7)
13 define <8 x float> @test_x86_avx_blend_ps_256(<8 x float> %a0) {
14 %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a0, i32 7)
22 define <4 x double> @test_x86_avx_blendv_pd_256(<4 x double> %a0, <4 x double> %a1) {
23 …%1 = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %a0, <4 x double> %a0, <4 x double…
31 define <8 x float> @test_x86_avx_blendv_ps_256(<8 x float> %a0, <8 x float> %a1) {
32 …%1 = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %a0, <8 x float> %a0, <8 x float> %a…
40 define <4 x double> @test2_x86_avx_blend_pd_256(<4 x double> %a0, <4 x double> %a1) {
41 %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a1, i32 0)
[all …]
Davx-intrinsics-x86.ll3 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
8 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
14 define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) {
19 …%res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#use…
25 define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) {
30 %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
36 define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) {
41 …%res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#use…
47 define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) {
52 %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1]
[all …]
/external/llvm/test/Transforms/InstCombine/
Dx86-vperm2.ll5 define <4 x double> @perm2pd_non_const_imm(<4 x double> %a0, <4 x double> %a1, i8 %b) {
6 …%res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 %b…
10 ; CHECK-NEXT: call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1…
17 define <4 x double> @perm2pd_0x88(<4 x double> %a0, <4 x double> %a1) {
18 …%res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 13…
25 define <8 x float> @perm2ps_0x88(<8 x float> %a0, <8 x float> %a1) {
26 %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 136)
33 define <8 x i32> @perm2si_0x88(<8 x i32> %a0, <8 x i32> %a1) {
34 %res = call <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32> %a0, <8 x i32> %a1, i8 136)
41 define <4 x i64> @perm2i_0x88(<4 x i64> %a0, <4 x i64> %a1) {
[all …]
/external/v8/test/mjsunit/
Darray-elements-from-array-prototype.js134 var a0 = [0, 1, , , 4, 5, , , , 9]
135 var result = a0.splice(4, 1)
138 assertEquals(0, a0[0])
139 assertTrue(a0.hasOwnProperty(0))
140 assertEquals(1, a0[1])
141 assertTrue(a0.hasOwnProperty(1))
142 assertEquals(undefined, a0[2])
143 assertFalse(a0.hasOwnProperty(2))
144 assertEquals(at3, a0[3])
145 assertFalse(a0.hasOwnProperty(3))
[all …]
Darray-elements-from-array-prototype-chain.js134 var a0 = [0, 1, , , 4, 5, , , , 9]
135 var result = a0.splice(4, 1)
138 assertEquals(0, a0[0])
139 assertTrue(a0.hasOwnProperty(0))
140 assertEquals(1, a0[1])
141 assertTrue(a0.hasOwnProperty(1))
142 assertEquals(undefined, a0[2])
143 assertFalse(a0.hasOwnProperty(2))
144 assertEquals(at3, a0[3])
145 assertFalse(a0.hasOwnProperty(3))
[all …]
Darray-elements-from-object-prototype.js134 var a0 = [0, 1, , , 4, 5, , , , 9]
135 var result = a0.splice(4, 1)
138 assertEquals(0, a0[0])
139 assertTrue(a0.hasOwnProperty(0))
140 assertEquals(1, a0[1])
141 assertTrue(a0.hasOwnProperty(1))
142 assertEquals(undefined, a0[2])
143 assertFalse(a0.hasOwnProperty(2))
144 assertEquals(at3, a0[3])
145 assertFalse(a0.hasOwnProperty(3))
[all …]

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