Searched refs:buffer_store_dwordx2 (Results 1 – 25 of 46) sorted by relevance
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/external/llvm/test/CodeGen/R600/ |
D | global-extload-i32.ll | 8 ; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]] 19 ; SI: buffer_store_dwordx2 29 ; SI: buffer_store_dwordx2 41 ; SI: buffer_store_dwordx2 52 ; SI: buffer_store_dwordx2 53 ; SI: buffer_store_dwordx2 66 ; SI-DAG: buffer_store_dwordx2 67 ; SI-DAG: buffer_store_dwordx2 78 ; SI: buffer_store_dwordx2 79 ; SI: buffer_store_dwordx2 [all …]
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D | insert_vector_elt.ll | 55 ; SI: buffer_store_dwordx2 {{v\[}}[[LOW_RESULT_REG]]: 93 ; SI: buffer_store_dwordx2 130 ; FIXMESI: buffer_store_dwordx2 163 ; FIXMESI: buffer_store_dwordx2 205 ; SI: buffer_store_dwordx2 206 ; SI: buffer_store_dwordx2 207 ; SI: buffer_store_dwordx2 208 ; SI: buffer_store_dwordx2 217 ; SI: buffer_store_dwordx2 218 ; SI: buffer_store_dwordx2 [all …]
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D | imm.ll | 8 ; CHECK: buffer_store_dwordx2 v{{\[}}[[LO_VGPR]]: 19 ; CHECK: buffer_store_dwordx2 v{{\[[0-9]+:}}[[HI_VGPR]] 31 ; CHECK: buffer_store_dwordx2 v{{\[}}[[LO_VREG]]:[[HI_VREG]]{{\]}} 330 ; CHECK: buffer_store_dwordx2 [[REG]] 341 ; CHECK: buffer_store_dwordx2 [[REG]] 352 ; CHECK: buffer_store_dwordx2 [[REG]] 363 ; CHECK: buffer_store_dwordx2 [[REG]] 374 ; CHECK: buffer_store_dwordx2 [[REG]] 385 ; CHECK: buffer_store_dwordx2 [[REG]] 396 ; CHECK: buffer_store_dwordx2 [[REG]] [all …]
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D | llvm.AMDGPU.fract.f64.ll | 16 ; SI: buffer_store_dwordx2 v{{\[}}[[RESLO]]:[[RESHI]]] 17 ; CI: buffer_store_dwordx2 [[FRC]] 33 ; SI: buffer_store_dwordx2 v{{\[}}[[RESLO]]:[[RESHI]]] 34 ; CI: buffer_store_dwordx2 [[FRC]] 51 ; SI: buffer_store_dwordx2 v{{\[}}[[RESLO]]:[[RESHI]]] 52 ; CI: buffer_store_dwordx2 [[FRC]]
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D | load64.ll | 7 ; CHECK: buffer_store_dwordx2 v[{{[0-9]+:[0-9]+}}] 16 ; CHECK: buffer_store_dwordx2 v[{{[0-9]+:[0-9]+}}] 26 ; CHECK: buffer_store_dwordx2 v[{{[0-9]+:[0-9]+}}]
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D | fma-combine.ll | 15 ; SI: buffer_store_dwordx2 [[RESULT]] 41 ; SI-DAG: buffer_store_dwordx2 [[RESULT0]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… 42 ; SI-DAG: buffer_store_dwordx2 [[RESULT1]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… 72 ; SI: buffer_store_dwordx2 [[RESULT]] 96 ; SI: buffer_store_dwordx2 [[RESULT]] 122 ; SI-DAG: buffer_store_dwordx2 [[RESULT0]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… 123 ; SI-DAG: buffer_store_dwordx2 [[RESULT1]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… 153 ; SI: buffer_store_dwordx2 [[RESULT]] 179 ; SI-DAG: buffer_store_dwordx2 [[RESULT0]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… 180 ; SI-DAG: buffer_store_dwordx2 [[RESULT1]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr6… [all …]
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D | reorder-stores.ll | 9 ; SI: buffer_store_dwordx2 10 ; SI: buffer_store_dwordx2 11 ; SI: buffer_store_dwordx2 12 ; SI: buffer_store_dwordx2
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D | sint_to_fp.f64.ll | 20 ; SI: buffer_store_dwordx2 32 ; SI: buffer_store_dwordx2 [[RESULT]] 53 ; SI: buffer_store_dwordx2 [[RESULT]]
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D | load-i1.ll | 78 ; SI: buffer_store_dwordx2 90 ; SI: buffer_store_dwordx2 121 ; SI: buffer_store_dwordx2 143 ; SI: buffer_store_dwordx2
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D | llvm.AMDGPU.trig_preop.ll | 10 ; SI: buffer_store_dwordx2 [[RESULT]], 23 ; SI: buffer_store_dwordx2 [[RESULT]],
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D | uint_to_fp.f64.ll | 11 ; SI: buffer_store_dwordx2 [[RESULT]] 80 ; SI: buffer_store_dwordx2 92 ; SI: buffer_store_dwordx2 [[RESULT]]
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D | local-64.ll | 53 ; BOTH: buffer_store_dwordx2 [[REG]], 63 ; BOTH: buffer_store_dwordx2 [[REG]], 73 ; BOTH: buffer_store_dwordx2 [[REG]], 83 ; BOTH: buffer_store_dwordx2 [[REG]],
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D | llvm.AMDGPU.div_scale.ll | 52 ; SI: buffer_store_dwordx2 [[RESULT0]] 72 ; SI: buffer_store_dwordx2 [[RESULT0]] 164 ; SI: buffer_store_dwordx2 [[RESULT0]] 182 ; SI: buffer_store_dwordx2 [[RESULT0]] 200 ; SI: buffer_store_dwordx2 [[RESULT0]] 218 ; SI: buffer_store_dwordx2 [[RESULT0]] 266 ; SI: buffer_store_dwordx2 [[RESULT0]] 281 ; SI: buffer_store_dwordx2 [[RESULT0]]
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D | sext-in-reg.ll | 83 ; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}} 97 ; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}} 122 ; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}} 147 ; SI: buffer_store_dwordx2 v{{\[}}[[VLO]]:[[VHI]]{{\]}} 187 ; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 208 ; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 229 ; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 249 ; SI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[SHR]]{{\]}} 311 ; SI: buffer_store_dwordx2 349 ; SI: buffer_store_dwordx2 [all …]
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D | 64bit-kernel-args.ll | 9 ; GCN: buffer_store_dwordx2
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D | indirect-private-64.ll | 11 ; SI-ALLOCA: buffer_store_dwordx2 53 ; SI-ALLOCA: buffer_store_dwordx2
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D | store.ll | 162 ; SI: buffer_store_dwordx2 332 ; SI: buffer_store_dwordx2 358 ; SI: buffer_store_dwordx2 359 ; SI: buffer_store_dwordx2
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D | build_vector.ll | 12 ; SI: buffer_store_dwordx2 v{{\[}}[[X]]:[[Y]]{{\]}}
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D | fp16_to_fp.ll | 23 ; SI: buffer_store_dwordx2 [[RESULT]]
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D | fmax3.f64.ll | 12 ; SI: buffer_store_dwordx2 [[RESULT]],
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D | zero_extend.ll | 12 ; SI: buffer_store_dwordx2 v[0:[[V_ZERO]]{{\]}}
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D | select-vectors.ll | 35 ; SI: buffer_store_dwordx2 73 ; SI: buffer_store_dwordx2
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D | fp_to_sint.f64.ll | 48 ; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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D | fcopysign.f64.ll | 18 ; GCN: buffer_store_dwordx2 v{{\[}}[[VMAG_LO]]:[[VRESULT_HI]]{{\]}}
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D | sign_extend.ll | 29 ; SI: buffer_store_dwordx2 v{{\[}}[[LOREG]]:[[HIREG]]{{\]}}
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