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Searched refs:dispatch_width (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_fs_emit.cpp96 else if (c->dispatch_width == 16) in generate_fb_write()
104 c->dispatch_width, in generate_fb_write()
136 if (c->dispatch_width == 16) { in generate_pixel_xy()
206 if (c->dispatch_width == 16) { in generate_math1_gen6()
230 if (c->dispatch_width == 16) { in generate_math2_gen6()
253 if (c->dispatch_width == 16) { in generate_math_gen4()
285 if (c->dispatch_width == 16) in generate_tex()
336 assert(c->dispatch_width == 8); in generate_tex()
738 prog->Name, c->dispatch_width); in generate_code()
801 if (inst->force_uncompressed || c->dispatch_width == 8) { in generate_code()
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Dbrw_wm_emit.c127 if (c->dispatch_width == 16) { in emit_pixel_xy()
297 if (c->dispatch_width == 16) { in emit_pixel_w()
926 if (c->dispatch_width == 16) { in emit_math1()
993 if (c->dispatch_width == 16) { in emit_math2()
1004 if (c->dispatch_width == 16) { in emit_math2()
1021 if (c->dispatch_width == 16) { in emit_math2()
1055 if (c->dispatch_width == 16) { in emit_tex()
1093 if (intel->gen < 5 && c->dispatch_width == 8) in emit_tex()
1127 } else if (c->dispatch_width == 8) { in emit_tex()
1145 if (c->dispatch_width == 16 && shadow) in emit_tex()
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Dbrw_fs.cpp400 return 1 * c->dispatch_width / 8; in implied_mrf_writes()
404 return 2 * c->dispatch_width / 8; in implied_mrf_writes()
824 inst->mlen = c->dispatch_width / 8; in emit_math()
887 inst->mlen = 2 * c->dispatch_width / 8; in emit_math()
900 if (c->dispatch_width != 8) in setup_paramvalues_refs()
915 if (c->dispatch_width == 8) { in assign_curb_setup()
1111 if (c->dispatch_width == 8) { in remove_dead_constants()
1205 if (c->dispatch_width == 16) { in setup_pull_constants()
1276 (c->dispatch_width == 16 && in propagate_constants()
1698 } else if (c->dispatch_width == 16 && in compute_to_mrf()
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Dbrw_wm.c217 if (c->dispatch_width == 16) { in brw_wm_payload_setup()
227 if (c->dispatch_width == 16) { in brw_wm_payload_setup()
237 if (c->dispatch_width == 16) { in brw_wm_payload_setup()
316 c->dispatch_width = 16; in do_wm_prog()
319 c->prog_data.dispatch_width = 16; in do_wm_prog()
Dbrw_fs_visitor.cpp114 if (c->dispatch_width == 16) { in visit()
371 if (intel->gen >= 7 && c->dispatch_width == 16) in visit()
384 if (intel->gen >= 7 && c->dispatch_width == 16) in visit()
392 if (intel->gen >= 7 && c->dispatch_width == 16) in visit()
924 int reg_width = c->dispatch_width / 8; in emit_texture_gen5()
1044 int reg_width = c->dispatch_width / 8; in emit_texture_gen7()
1075 if (c->dispatch_width == 16) in emit_texture_gen7()
1201 if (c->dispatch_width == 16) { in emit_texcoord()
1666 if (intel->gen < 6 && c->dispatch_width == 16) { in visit()
1710 if (intel->gen < 6 && c->dispatch_width == 16) { in visit()
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Dgen7_wm_state.c150 brw->wm.prog_data->dispatch_width) / 8); in upload_ps_state()
199 if (brw->wm.prog_data->dispatch_width == 8) { in upload_ps_state()
Dgen6_wm_state.c124 brw->wm.prog_data->dispatch_width) / 8 - 1); in upload_wm_state()
154 if (brw->wm.prog_data->dispatch_width == 8) { in upload_wm_state()
Dbrw_fs_reg_allocate.cpp48 int reg_width = c->dispatch_width / 8; in assign_regs_trivial()
157 int reg_width = c->dispatch_width / 8; in assign_regs()
240 } else if (c->dispatch_width == 16) { in assign_regs()
Dbrw_fs_live_variables.cpp283 if (c->dispatch_width == 16 && (this->pixel_x.reg == a || in virtual_grf_interferes()
Dbrw_wm.h275 GLuint dispatch_width; member
Dbrw_fs_schedule_instructions.cpp242 return (v->c->dispatch_width == 16 && in is_compressed()
Dbrw_context.h307 int dispatch_width; member
Dbrw_eu.h951 int dispatch_width,
Dbrw_eu_emit.c2236 int dispatch_width, in brw_fb_WRITE() argument
2251 if (dispatch_width == 16) in brw_fb_WRITE()