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Searched refs:dstGA (Results 1 – 14 of 14) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_tilegx_defs.h415 Addr64 dstGA; /* next guest address */ member
424 HReg dstGA; member
432 HReg dstGA; member
503 extern TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC,
505 extern TILEGXInstr *TILEGXInstr_XIndir ( HReg dstGA, TILEGXAMode* amPC,
507 extern TILEGXInstr *TILEGXInstr_XAssisted ( HReg dstGA, TILEGXAMode* amPC,
Dhost_x86_defs.h462 Addr32 dstGA; /* next guest address */ member
470 HReg dstGA; member
477 HReg dstGA; member
672 extern X86Instr* X86Instr_XDirect ( Addr32 dstGA, X86AMode* amEIP,
674 extern X86Instr* X86Instr_XIndir ( HReg dstGA, X86AMode* amEIP,
676 extern X86Instr* X86Instr_XAssisted ( HReg dstGA, X86AMode* amEIP,
Dhost_amd64_defs.h481 Addr64 dstGA; /* next guest address */ member
489 HReg dstGA; member
496 HReg dstGA; member
722 extern AMD64Instr* AMD64Instr_XDirect ( Addr64 dstGA, AMD64AMode* amRIP,
724 extern AMD64Instr* AMD64Instr_XIndir ( HReg dstGA, AMD64AMode* amRIP,
726 extern AMD64Instr* AMD64Instr_XAssisted ( HReg dstGA, AMD64AMode* amRIP,
Dhost_tilegx_defs.c295 vex_printf("move r11, 0x%x,", (UInt)instr->GXin.XDirect.dstGA); in ppTILEGXInstr()
305 ppHRegTILEGX(instr->GXin.XIndir.dstGA); in ppTILEGXInstr()
315 ppHRegTILEGX(instr->GXin.XAssisted.dstGA); in ppTILEGXInstr()
832 TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC, in TILEGXInstr_XDirect() argument
837 i->GXin.XDirect.dstGA = dstGA; in TILEGXInstr_XDirect()
844 TILEGXInstr *TILEGXInstr_XIndir ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XIndir() argument
849 i->GXin.XIndir.dstGA = dstGA; in TILEGXInstr_XIndir()
855 TILEGXInstr *TILEGXInstr_XAssisted ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XAssisted() argument
860 i->GXin.XAssisted.dstGA = dstGA; in TILEGXInstr_XAssisted()
1037 addHRegUse(u, HRmRead, i->GXin.XIndir.dstGA); in getRegUsage_TILEGXInstr()
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Dhost_arm_defs.h699 Addr32 dstGA; /* next guest address */ member
707 HReg dstGA; member
714 HReg dstGA; member
975 extern ARMInstr* ARMInstr_XDirect ( Addr32 dstGA, ARMAMode1* amR15T,
977 extern ARMInstr* ARMInstr_XIndir ( HReg dstGA, ARMAMode1* amR15T,
979 extern ARMInstr* ARMInstr_XAssisted ( HReg dstGA, ARMAMode1* amR15T,
Dhost_mips_defs.h458 Addr64 dstGA; /* next guest address */ member
466 HReg dstGA; member
473 HReg dstGA; member
638 extern MIPSInstr *MIPSInstr_XDirect ( Addr64 dstGA, MIPSAMode* amPC,
640 extern MIPSInstr *MIPSInstr_XIndir(HReg dstGA, MIPSAMode* amPC,
642 extern MIPSInstr *MIPSInstr_XAssisted(HReg dstGA, MIPSAMode* amPC,
Dhost_arm64_defs.h607 Addr64 dstGA; /* next guest address */ member
615 HReg dstGA; member
622 HReg dstGA; member
895 extern ARM64Instr* ARM64Instr_XDirect ( Addr64 dstGA, ARM64AMode* amPC,
897 extern ARM64Instr* ARM64Instr_XIndir ( HReg dstGA, ARM64AMode* amPC,
899 extern ARM64Instr* ARM64Instr_XAssisted ( HReg dstGA, ARM64AMode* amPC,
Dhost_ppc_defs.h623 Addr64 dstGA; /* next guest address */ member
631 HReg dstGA; member
638 HReg dstGA; member
1010 extern PPCInstr* PPCInstr_XDirect ( Addr64 dstGA, PPCAMode* amCIA,
1012 extern PPCInstr* PPCInstr_XIndir ( HReg dstGA, PPCAMode* amCIA,
1014 extern PPCInstr* PPCInstr_XAssisted ( HReg dstGA, PPCAMode* amCIA,
Dhost_amd64_defs.c690 AMD64Instr* AMD64Instr_XDirect ( Addr64 dstGA, AMD64AMode* amRIP, in AMD64Instr_XDirect() argument
694 i->Ain.XDirect.dstGA = dstGA; in AMD64Instr_XDirect()
700 AMD64Instr* AMD64Instr_XIndir ( HReg dstGA, AMD64AMode* amRIP, in AMD64Instr_XIndir() argument
704 i->Ain.XIndir.dstGA = dstGA; in AMD64Instr_XIndir()
709 AMD64Instr* AMD64Instr_XAssisted ( HReg dstGA, AMD64AMode* amRIP, in AMD64Instr_XAssisted() argument
713 i->Ain.XAssisted.dstGA = dstGA; in AMD64Instr_XAssisted()
1091 vex_printf("movabsq $0x%llx,%%r11; ", i->Ain.XDirect.dstGA); in ppAMD64Instr()
1103 ppHRegAMD64(i->Ain.XIndir.dstGA); in ppAMD64Instr()
1113 ppHRegAMD64(i->Ain.XAssisted.dstGA); in ppAMD64Instr()
1478 addHRegUse(u, HRmRead, i->Ain.XIndir.dstGA); in getRegUsage_AMD64Instr()
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Dhost_x86_defs.c652 X86Instr* X86Instr_XDirect ( Addr32 dstGA, X86AMode* amEIP, in X86Instr_XDirect() argument
656 i->Xin.XDirect.dstGA = dstGA; in X86Instr_XDirect()
662 X86Instr* X86Instr_XIndir ( HReg dstGA, X86AMode* amEIP, in X86Instr_XIndir() argument
666 i->Xin.XIndir.dstGA = dstGA; in X86Instr_XIndir()
671 X86Instr* X86Instr_XAssisted ( HReg dstGA, X86AMode* amEIP, in X86Instr_XAssisted() argument
675 i->Xin.XAssisted.dstGA = dstGA; in X86Instr_XAssisted()
997 vex_printf("movl $0x%x,", i->Xin.XDirect.dstGA); in ppX86Instr()
1007 ppHRegX86(i->Xin.XIndir.dstGA); in ppX86Instr()
1017 ppHRegX86(i->Xin.XAssisted.dstGA); in ppX86Instr()
1329 addHRegUse(u, HRmRead, i->Xin.XIndir.dstGA); in getRegUsage_X86Instr()
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Dhost_mips_defs.c906 MIPSInstr *MIPSInstr_XDirect ( Addr64 dstGA, MIPSAMode* amPC, in MIPSInstr_XDirect() argument
910 i->Min.XDirect.dstGA = dstGA; in MIPSInstr_XDirect()
917 MIPSInstr *MIPSInstr_XIndir ( HReg dstGA, MIPSAMode* amPC, in MIPSInstr_XIndir() argument
921 i->Min.XIndir.dstGA = dstGA; in MIPSInstr_XIndir()
927 MIPSInstr *MIPSInstr_XAssisted ( HReg dstGA, MIPSAMode* amPC, in MIPSInstr_XAssisted() argument
931 i->Min.XAssisted.dstGA = dstGA; in MIPSInstr_XAssisted()
1321 vex_printf("move $9, 0x%x,", (UInt)i->Min.XDirect.dstGA); in ppMIPSInstr()
1331 ppHRegMIPS(i->Min.XIndir.dstGA, mode64); in ppMIPSInstr()
1341 ppHRegMIPS(i->Min.XAssisted.dstGA, mode64); in ppMIPSInstr()
1690 addHRegUse(u, HRmRead, i->Min.XIndir.dstGA); in getRegUsage_MIPSInstr()
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Dhost_arm_defs.c1180 ARMInstr* ARMInstr_XDirect ( Addr32 dstGA, ARMAMode1* amR15T, in ARMInstr_XDirect() argument
1184 i->ARMin.XDirect.dstGA = dstGA; in ARMInstr_XDirect()
1190 ARMInstr* ARMInstr_XIndir ( HReg dstGA, ARMAMode1* amR15T, in ARMInstr_XIndir() argument
1194 i->ARMin.XIndir.dstGA = dstGA; in ARMInstr_XIndir()
1199 ARMInstr* ARMInstr_XAssisted ( HReg dstGA, ARMAMode1* amR15T, in ARMInstr_XAssisted() argument
1203 i->ARMin.XAssisted.dstGA = dstGA; in ARMInstr_XAssisted()
1642 (UInt)(i->ARMin.XDirect.dstGA & 0xFFFF)); in ppARMInstr()
1644 (UInt)((i->ARMin.XDirect.dstGA >> 16) & 0xFFFF)); in ppARMInstr()
1658 ppHRegARM(i->ARMin.XIndir.dstGA); in ppARMInstr()
1670 ppHRegARM(i->ARMin.XAssisted.dstGA); in ppARMInstr()
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Dhost_arm64_defs.c920 ARM64Instr* ARM64Instr_XDirect ( Addr64 dstGA, ARM64AMode* amPC, in ARM64Instr_XDirect() argument
924 i->ARM64in.XDirect.dstGA = dstGA; in ARM64Instr_XDirect()
930 ARM64Instr* ARM64Instr_XIndir ( HReg dstGA, ARM64AMode* amPC, in ARM64Instr_XIndir() argument
934 i->ARM64in.XIndir.dstGA = dstGA; in ARM64Instr_XIndir()
939 ARM64Instr* ARM64Instr_XAssisted ( HReg dstGA, ARM64AMode* amPC, in ARM64Instr_XAssisted() argument
943 i->ARM64in.XAssisted.dstGA = dstGA; in ARM64Instr_XAssisted()
1474 vex_printf("imm64 x9,0x%llx; ", i->ARM64in.XDirect.dstGA); in ppARM64Instr()
1486 ppHRegARM64(i->ARM64in.XIndir.dstGA); in ppARM64Instr()
1497 ppHRegARM64(i->ARM64in.XAssisted.dstGA); in ppARM64Instr()
1984 addHRegUse(u, HRmRead, i->ARM64in.XIndir.dstGA); in getRegUsage_ARM64Instr()
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Dhost_ppc_defs.c806 PPCInstr* PPCInstr_XDirect ( Addr64 dstGA, PPCAMode* amCIA, in PPCInstr_XDirect() argument
810 i->Pin.XDirect.dstGA = dstGA; in PPCInstr_XDirect()
816 PPCInstr* PPCInstr_XIndir ( HReg dstGA, PPCAMode* amCIA, in PPCInstr_XIndir() argument
820 i->Pin.XIndir.dstGA = dstGA; in PPCInstr_XIndir()
825 PPCInstr* PPCInstr_XAssisted ( HReg dstGA, PPCAMode* amCIA, in PPCInstr_XAssisted() argument
829 i->Pin.XAssisted.dstGA = dstGA; in PPCInstr_XAssisted()
1577 vex_printf("imm64 r30,0x%llx; ", i->Pin.XDirect.dstGA); in ppPPCInstr()
1580 vex_printf("imm32 r30,0x%llx; ", i->Pin.XDirect.dstGA); in ppPPCInstr()
1599 ppHRegPPC(i->Pin.XIndir.dstGA); in ppPPCInstr()
1611 ppHRegPPC(i->Pin.XAssisted.dstGA); in ppPPCInstr()
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