Searched refs:frint (Results 1 – 18 of 18) sorted by relevance
19 # CHECK: frint.w $w7, $w15 # encoding: [0x7b,0x2c,0x79,0xde]20 # CHECK: frint.d $w21, $w22 # encoding: [0x7b,0x2d,0xb5,0x5e]52 frint.w $w7, $w1553 frint.d $w21, $w22
90 %1 = tail call <4 x float> @llvm.mips.frint.w(<4 x float> %0)95 declare <4 x float> @llvm.mips.frint.w(<4 x float>) nounwind100 ; CHECK-DAG: frint.w [[WD:\$w[0-9]+]], [[WS]]111 %1 = tail call <2 x double> @llvm.mips.frint.d(<2 x double> %0)116 declare <2 x double> @llvm.mips.frint.d(<2 x double>) nounwind121 ; CHECK-DAG: frint.d [[WD:\$w[0-9]+]], [[WS]]139 ; CHECK-DAG: frint.w [[WD:\$w[0-9]+]], [[WS]]157 ; CHECK-DAG: frint.d [[WD:\$w[0-9]+]], [[WS]]
19 0x7b 0x2c 0x79 0xde # CHECK: frint.w $w7, $w1520 0x7b 0x2d 0xb5 0x5e # CHECK: frint.d $w21, $w22
34 VOP_F64_F64, frint
739 def RNDNE : R600_1OP_Helper <0x13, "RNDNE", frint>;
1324 VOP_F32_F32, frint
268 // frint rounds according to the current mode (modifier 0) and detects270 def : Pat<(frint FP32:$src), (FIEBR 0, FP32:$src)>;271 def : Pat<(frint FP64:$src), (FIDBR 0, FP64:$src)>;272 def : Pat<(frint FP128:$src), (FIXBR 0, FP128:$src)>;281 // fnearbyint is like frint but does not detect inexact conditions.
23 + Added support for all `frint` instruction variants.
316 [(set R600_Reg32:$dst, (frint R600_Reg32:$src))]
2162 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;2163 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
6551 def : Pat<(f32 (frint FR32:$src)),6553 def : Pat<(f64 (frint FR64:$src)),6568 def : Pat<(v4f32 (frint VR128:$src)),6579 def : Pat<(v2f64 (frint VR128:$src)),6590 def : Pat<(v8f32 (frint VR256:$src)),6601 def : Pat<(v4f64 (frint VR256:$src)),6627 def : Pat<(f32 (frint FR32:$src)),6629 def : Pat<(f64 (frint FR64:$src)),6642 def : Pat<(v4f32 (frint VR128:$src)),6653 def : Pat<(v2f64 (frint VR128:$src)),
4821 def : Pat<(frint _.FRC:$src), (COPY_TO_REGCLASS4837 def : Pat<(frint (_.ScalarLdFrag addr:$src)), (COPY_TO_REGCLASS4859 def : Pat<(v16f32 (frint VR512:$src)),4870 def : Pat<(v8f64 (frint VR512:$src)),
2260 frint(vform, rd, rn, fpcr_rounding, inexact_exception); in VisitFPDataProcessing1Source()2619 frint(fpf, rd, rn, fpcr_rounding, inexact_exception); in VisitNEON2RegMisc()
2437 LogicVRegister frint(VectorFormat vform,
4352 LogicVRegister Simulator::frint(VectorFormat vform, in frint() function in vixl::Simulator
408 def frint : SDNode<"ISD::FRINT" , SDTFPUnaryOp>;
743 defm VRINTX : vrint_inst_zrx<"x", 1, 0, frint>;
2404 defm FRINTX : SingleOperandFPData<0b1110, "frintx", frint>;2611 defm FRINTX : SIMDTwoVectorFP<1, 0, 0b11001, "frintx", frint>;