Searched refs:getDeadRegState (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 397 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
399 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
401 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
403 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
434 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
530 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
532 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
534 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
536 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
578 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
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| D | MLxExpansionPass.cpp | 301 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
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| D | ARMBaseInstrInfo.h | 397 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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| D | ARMLoadStoreOptimizer.cpp | 1461 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1519 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1520 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); in FixInvalidRegPairOp()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 110 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk()
188 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
212 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
362 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
378 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
528 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
553 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 192 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 407 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 283 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 2643 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddressWithLEA()
5467 getDeadRegState(MO.isDead()) | in unfoldMemoryOperand()
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