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Searched refs:getImm (Results 1 – 25 of 207) sorted by relevance

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/external/llvm/lib/Target/R600/
DR600ClauseMergePass.cpp77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); in getCFAluSize()
83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); in isCFAluEnabled()
124 if (LatrCFAlu->getOperand(Mode0Idx).getImm() && in mergeIfPossible()
125 RootCFAlu->getOperand(Mode0Idx).getImm() && in mergeIfPossible()
126 (LatrCFAlu->getOperand(KBank0Idx).getImm() != in mergeIfPossible()
127 RootCFAlu->getOperand(KBank0Idx).getImm() || in mergeIfPossible()
128 LatrCFAlu->getOperand(KBank0LineIdx).getImm() != in mergeIfPossible()
129 RootCFAlu->getOperand(KBank0LineIdx).getImm())) { in mergeIfPossible()
140 if (LatrCFAlu->getOperand(Mode1Idx).getImm() && in mergeIfPossible()
141 RootCFAlu->getOperand(Mode1Idx).getImm() && in mergeIfPossible()
[all …]
/external/llvm/lib/Target/R600/InstPrinter/
DAMDGPUInstPrinter.cpp32 O << formatHex(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmOperand()
37 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmOperand()
42 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); in printU32ImmOperand()
47 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmDecOperand()
52 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmDecOperand()
57 if (MI->getOperand(OpNo).getImm()) in printOffen()
63 if (MI->getOperand(OpNo).getImm()) in printIdxen()
69 if (MI->getOperand(OpNo).getImm()) in printAddr64()
75 if (MI->getOperand(OpNo).getImm()) { in printMBUFOffset()
83 uint16_t Imm = MI->getOperand(OpNo).getImm(); in printDSOffset()
[all …]
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp79 switch (MI->getOperand(0).getImm()) { in printInst()
120 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); in printInst()
131 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); in printInst()
142 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst()
151 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { in printInst()
157 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); in printInst()
180 MI->getOperand(3).getImm() == -4) { in printInst()
209 MI->getOperand(4).getImm() == 4) { in printInst()
304 MI->getOperand(0).getImm() == 0 && in printInst()
326 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">"); in printOperand()
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/external/llvm/lib/Target/SystemZ/InstPrinter/
DSystemZInstPrinter.cpp38 O << MO.getImm(); in printOperand()
58 int64_t Value = MI->getOperand(OpNum).getImm(); in printU4ImmOperand()
65 int64_t Value = MI->getOperand(OpNum).getImm(); in printU6ImmOperand()
72 int64_t Value = MI->getOperand(OpNum).getImm(); in printS8ImmOperand()
79 int64_t Value = MI->getOperand(OpNum).getImm(); in printU8ImmOperand()
86 int64_t Value = MI->getOperand(OpNum).getImm(); in printS16ImmOperand()
93 int64_t Value = MI->getOperand(OpNum).getImm(); in printU16ImmOperand()
100 int64_t Value = MI->getOperand(OpNum).getImm(); in printS32ImmOperand()
107 int64_t Value = MI->getOperand(OpNum).getImm(); in printU32ImmOperand()
114 uint64_t Value = MI->getOperand(OpNum).getImm(); in printAccessRegOperand()
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/external/llvm/lib/Target/PowerPC/InstPrinter/
DPPCInstPrinter.cpp57 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
58 unsigned char MB = MI->getOperand(3).getImm(); in printInst()
59 unsigned char ME = MI->getOperand(4).getImm(); in printInst()
90 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
91 unsigned char ME = MI->getOperand(3).getImm(); in printInst()
123 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand()
219 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU1ImmOperand()
226 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU2ImmOperand()
233 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU3ImmOperand()
240 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU4ImmOperand()
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/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp220 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
231 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue()
252 return MO.getImm(); in getAdrLabelOpValue()
277 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
279 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
283 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); in getAddSubImmOpValue()
305 return MO.getImm(); in getCondBranchTargetOpValue()
327 return MO.getImm(); in getLoadLiteralOpValue()
343 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); in getMemExtendOpValue()
344 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); in getMemExtendOpValue()
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/external/llvm/lib/Target/R600/MCTargetDesc/
DR600MCCodeEmitter.cpp101 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset in EncodeInstruction()
110 int64_t Sampler = MI.getOperand(14).getImm(); in EncodeInstruction()
113 MI.getOperand(2).getImm(), in EncodeInstruction()
114 MI.getOperand(3).getImm(), in EncodeInstruction()
115 MI.getOperand(4).getImm(), in EncodeInstruction()
116 MI.getOperand(5).getImm() in EncodeInstruction()
119 MI.getOperand(6).getImm() & 0x1F, in EncodeInstruction()
120 MI.getOperand(7).getImm() & 0x1F, in EncodeInstruction()
121 MI.getOperand(8).getImm() & 0x1F in EncodeInstruction()
181 return MO.getImm(); in getMachineOpValue()
/external/llvm/lib/Target/X86/InstPrinter/
DX86ATTInstPrinter.cpp74 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC()
114 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC()
130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl()
146 O << formatImm(Op.getImm()); in printPCRelImm()
169 O << markup("<imm:") << '$' << formatImm((int64_t)Op.getImm()) in printOperand()
176 (Op.getImm() > 255 || Op.getImm() < -256)) in printOperand()
177 *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm()); in printOperand()
201 int64_t DispVal = DispSpec.getImm(); in printMemReference()
217 unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm(); in printMemReference()
273 O << formatImm(DispSpec.getImm()); in printMemOffset()
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DX86IntelInstPrinter.cpp56 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC()
96 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC()
112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl()
127 O << formatImm(Op.getImm()); in printPCRelImm()
150 O << formatImm((int64_t)Op.getImm()); in printOperand()
160 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); in printMemReference()
192 int64_t DispVal = DispSpec.getImm(); in printMemReference()
245 O << formatImm(DispSpec.getImm()); in printMemOffset()
256 O << formatImm(MI->getOperand(Op).getImm() & 0xff); in printU8Imm()
DX86InstComments.cpp136 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
147 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
161 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
172 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
186 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
197 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
209 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
221 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
236 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
316 MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
[all …]
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp73 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { in printInst()
76 switch (Op3.getImm()) { in printInst()
112 int64_t immr = Op2.getImm(); in printInst()
113 int64_t imms = Op3.getImm(); in printInst()
143 if (Op2.getImm() > Op3.getImm()) { in printInst()
146 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; in printInst()
154 << ", #" << Op2.getImm() << ", #" << Op3.getImm() - Op2.getImm() + 1; in printInst()
162 int ImmR = MI->getOperand(3).getImm(); in printInst()
163 int ImmS = MI->getOperand(4).getImm(); in printInst()
641 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; in printInst()
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/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp194 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); in getLdStmModeOpValue()
294 unsigned SoImm = MO.getImm(); in getSOImmOpValue()
326 return MO.getImm(); in getModImmOpValue()
333 unsigned SoImm = MI.getOperand(Op).getImm(); in getT2SOImmOpValue()
366 return 64 - MI.getOperand(Op).getImm(); in getNEONVcvtImm32OpValue()
547 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
566 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
594 if (MO.isImm()) return MO.getImm(); in getBranchTargetOpValue()
632 return encodeThumbBLOffset(MO.getImm()); in getThumbBLTargetOpValue()
645 return encodeThumbBLOffset(MO.getImm()); in getThumbBLXTargetOpValue()
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DARMMCTargetDesc.cpp37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
69 MI.getOperand(1).getImm() != 8) { in getITDeprecationInfo()
353 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL) in isUnconditionalBranch()
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/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp70 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); in splitMove()
73 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm()); in splitMove()
74 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm()); in splitMove()
90 OffsetMO.getImm()); in splitAdjDynAlloc()
110 MI->getOperand(1).setImm(uint32_t(MI->getOperand(1).getImm())); in expandRIPseudo()
142 MI->getOperand(2).getImm()); in expandRXYPseudo()
198 MI->getOperand(2).getImm() == 0 && in isSimpleMove()
223 MI->getOperand(1).getImm() != 0 || in isStackSlotCopy()
225 MI->getOperand(4).getImm() != 0) in isStackSlotCopy()
229 int64_t Length = MI->getOperand(2).getImm(); in isStackSlotCopy()
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DSystemZAsmPrinter.cpp35 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
40 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
49 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
54 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
64 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
65 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
66 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
135 .addImm(MI->getOperand(2).getImm()); in EmitInstruction()
141 .addImm(MI->getOperand(2).getImm()); in EmitInstruction()
238 OS << -int64_t(MI->getOperand(OpNo).getImm()); in PrintAsmOperand()
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/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp371 int64_t getImm() const { in getImm() function
428 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } in isU1Imm()
429 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } in isU2Imm()
430 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } in isU3Imm()
431 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } in isU4Imm()
432 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } in isU5Imm()
433 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } in isS5Imm()
434 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } in isU6Imm()
436 isUInt<6>(getImm()) && in isU6ImmX2()
437 (getImm() & 1) == 0; } in isU6ImmX2()
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/external/llvm/lib/Target/Hexagon/
DHexagonCopyToCombine.cpp142 bool NotExt = Op1.isImm() && isInt<8>(Op1.getImm()); in isCombinableInstType()
171 !isInt<8>(I->getOperand(1).getImm()); in isGreaterThan8BitTFRI()
175 !isUInt<6>(I->getOperand(1).getImm()); in isGreaterThan6BitTFRI()
566 .addImm(LoOperand.getImm()); in emitCombineII()
571 .addImm(HiOperand.getImm()) in emitCombineII()
578 if (!isInt<8>(HiOperand.getImm())) { in emitCombineII()
579 assert(isInt<8>(LoOperand.getImm())); in emitCombineII()
581 .addImm(HiOperand.getImm()) in emitCombineII()
582 .addImm(LoOperand.getImm()); in emitCombineII()
586 if (!isUInt<6>(LoOperand.getImm())) { in emitCombineII()
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/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp39 O << Op.getImm(); in printPCRelImmOperand()
53 O << '#' << Op.getImm(); in printOperand()
81 O << Disp.getImm(); in printSrcMemOperand()
91 unsigned CC = MI->getOperand(OpNo).getImm(); in printCCOperand()
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp324 const MCExpr *getImm() const { in getImm() function in __anon26fd99540211::AArch64Operand
419 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isSImm9()
428 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isSImm7s4()
437 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isSImm7s8()
446 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isSImm7s16()
490 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isUImm12Offset()
492 return isSymbolicUImm12Offset(getImm(), Scale); in isUImm12Offset()
501 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isImm0_7()
510 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isImm1_8()
519 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm()); in isImm0_15()
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/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp56 int64_t Shift = Inst.getOperand(2).getImm(); in LowerLargeShift()
95 int64_t pos = InstIn.getOperand(2).getImm(); in LowerDextDins()
97 int64_t size = InstIn.getOperand(3).getImm(); in LowerDextDins()
210 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTargetOpValue()
232 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTarget7OpValueMM()
254 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMMPC10()
276 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMM()
299 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget21OpValue()
321 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget26OpValue()
342 if (MO.isImm()) return MO.getImm(); in getJumpOffset16OpValue()
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/external/llvm/lib/Target/ARM/
DARMOptimizeBarriersPass.cpp68 if (MI.getOperand(0).getImm() == DMBType) { in runOnMachineFunction()
73 DMBType = MI.getOperand(0).getImm(); in runOnMachineFunction()
78 DMBType = MI.getOperand(0).getImm(); in runOnMachineFunction()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonInstPrinter.cpp146 O << MI->getOperand(OpNo).getImm(); in printImmOperand()
163 int ImmValue = MO.getImm(); in printExtOperand()
173 O << MI->getOperand(OpNo).getImm(); in printUnsignedImmOperand()
178 O << -MI->getOperand(OpNo).getImm(); in printNegImmOperand()
192 O << " + #" << MO1.getImm(); in printMEMriOperand()
200 O << getRegisterName(MO0.getReg()) << ", #" << MO1.getImm(); in printFrameIndexOperand()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp189 if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && in isLoadFromStackSlot()
218 if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && in isStoreToStackSlot()
244 if (MI->getOperand(3).getImm() != 0) in commuteInstruction()
275 unsigned MB = MI->getOperand(4).getImm(); in commuteInstruction()
276 unsigned ME = MI->getOperand(5).getImm(); in commuteInstruction()
564 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch()
567 else if (Cond[0].getImm() == PPC::PRED_BIT_SET) in InsertBranch()
569 else if (Cond[0].getImm() == PPC::PRED_BIT_UNSET) in InsertBranch()
573 .addImm(Cond[0].getImm()).addOperand(Cond[1]).addMBB(TBB); in InsertBranch()
579 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch()
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/external/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp357 if (I->getOperand(2).getImm() == in mergePairedInsns()
358 Paired->getOperand(2).getImm() + OffsetStride) { in mergePairedInsns()
371 int OffsetImm = RtMI->getOperand(2).getImm(); in mergePairedInsns()
502 int Offset = FirstMI->getOperand(2).getImm(); in findMatchingInsn()
555 int MIOffset = MI->getOperand(2).getImm(); in findMatchingInsn()
649 int Value = Update->getOperand(2).getImm(); in mergePreIdxUpdateInsn()
650 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 && in mergePreIdxUpdateInsn()
692 int Value = Update->getOperand(2).getImm(); in mergePostIdxUpdateInsn()
693 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 && in mergePostIdxUpdateInsn()
738 if (AArch64_AM::getShiftValue(MI->getOperand(3).getImm())) in isMatchingUpdateInsn()
[all …]
/external/llvm/lib/Target/NVPTX/InstPrinter/
DNVPTXInstPrinter.cpp85 O << markup("<imm:") << formatImm(Op.getImm()) << markup(">"); in printOperand()
95 int64_t Imm = MO.getImm(); in printCvtMode()
145 int64_t Imm = MO.getImm(); in printCmpMode()
219 int Imm = (int) MO.getImm(); in printLdStCode()
272 MI->getOperand(OpNum + 1).getImm() == 0) in printMemOperand()

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