| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1548 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1550 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg()
1573 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1575 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg()
1697 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
1699 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg()
1714 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
1716 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
1731 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
1733 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
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| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 472 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function
474 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /external/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 71 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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| D | TwoAddressInstructionPass.cpp | 1476 assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB)) in processTiedPairs()
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| D | RegisterCoalescer.cpp | 325 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src)); in setRegisters()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 1173 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1191 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1203 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1291 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1307 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1318 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| D | A15SDOptimizer.cpp | 151 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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| D | ARMBaseInstrInfo.cpp | 1292 unsigned DstRegD = TRI->getMatchingSuperReg(DstRegS, ARM::ssub_0, in expandPostRAPseudo()
1294 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo()
4153 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); in getCorrespondingDRegAndLane()
4160 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); in getCorrespondingDRegAndLane()
4467 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, in getPartialRegUpdateClearance()
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| /external/llvm/lib/Target/R600/ |
| D | R600ControlFlowFinalizer.cpp | 294 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
303 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| D | SIISelLowering.cpp | 546 Reg = TRI->getMatchingSuperReg(Reg, AMDGPU::sub0, in LowerFormalArguments()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 342 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 736 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg()
745 TRI->getMatchingSuperReg(DestReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg()
754 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg()
763 TRI->getMatchingSuperReg(SrcReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg()
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| D | PPCISelLowering.cpp | 10645 return std::make_pair(TRI->getMatchingSuperReg(R.first, in getRegForInlineAsmConstraint()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCopyToCombine.cpp | 524 TRI->getMatchingSuperReg(LoRegDef, Hexagon::subreg_loreg, in combine()
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1200 Reg = MRI.getMatchingSuperReg(Reg, AArch64::dsub, &FPR128RC); in printVectorList()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 3630 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList()
3635 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList()
3811 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList()
3824 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList()
5896 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0, in ParseInstruction()
5953 unsigned SuperReg = MRI->getMatchingSuperReg( in ParseInstruction()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 287 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg( in printInst()
|