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Searched refs:getOperandIdx (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/R600/
DR600ClauseMergePass.cpp77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); in getCFAluSize()
83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); in isCFAluEnabled()
88 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); in cleanPotentialDisabledCFAlu()
107 int CntIdx = TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT); in mergeIfPossible()
119 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0); in mergeIfPossible()
121 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0); in mergeIfPossible()
123 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0); in mergeIfPossible()
135 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1); in mergeIfPossible()
137 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1); in mergeIfPossible()
139 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR1); in mergeIfPossible()
DR600ExpandSpecialInstrs.cpp61 int OpIdx = TII->getOperandIdx(*OldMI, Op); in SetFlagInNewMI()
83 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst); in runOnMachineFunction()
89 int LDSPredSelIdx = TII->getOperandIdx(MI.getOpcode(), in runOnMachineFunction()
91 int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(), in runOnMachineFunction()
223 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0)) in runOnMachineFunction()
226 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1)) in runOnMachineFunction()
273 TII->getOperandIdx(MI, AMDGPU::OpName::dst)).getReg(); in runOnMachineFunction()
275 TII->getOperandIdx(MI, AMDGPU::OpName::src0)).getReg(); in runOnMachineFunction()
280 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName::src1); in runOnMachineFunction()
DR600InstrInfo.cpp76 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0)) in copyPhysReg()
154 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) == -1; in isLDSNoRetInstr()
158 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) != -1; in isLDSRetInstr()
266 return getOperandIdx(Opcode, OpTable[SrcNum]); in getSrcIdx()
285 if (getOperandIdx(Opcode, Row[0]) == (int)SrcIdx) { in getSelIdx()
286 return getOperandIdx(Opcode, Row[1]); in getSelIdx()
309 MachineOperand &MO = MI->getOperand(getOperandIdx(MI->getOpcode(), in getSrcs()
313 unsigned Sel = MI->getOperand(getOperandIdx(MI->getOpcode(), in getSrcs()
330 int SrcIdx = getOperandIdx(MI->getOpcode(), OpTable[j][0]); in getSrcs()
337 getOperandIdx(MI->getOpcode(), OpTable[j][1])).getImm(); in getSrcs()
[all …]
DR600Packetizer.cpp90 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::write); in getPreviousVector()
93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst); in getPreviousVector()
140 int OperandIdx = TII->getOperandIdx(MI->getOpcode(), Ops[i]); in substitutePV()
193 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel), in isLegalToPacketizeTogether()
194 OpJ = TII->getOperandIdx(MIJ->getOpcode(), AMDGPU::OpName::pred_sel); in isLegalToPacketizeTogether()
230 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::last); in setIsLastBit()
307 unsigned Op = TII->getOperandIdx(MI->getOpcode(), in addToPacket()
311 unsigned Op = TII->getOperandIdx(MI->getOpcode(), in addToPacket()
DR600ISelLowering.cpp207 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in EmitInstrWithCustomInserter()
2077 bool HasDst = TII->getOperandIdx(Opcode, AMDGPU::OpName::dst) > -1; in FoldOperand()
2088 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0), in FoldOperand()
2089 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1), in FoldOperand()
2090 TII->getOperandIdx(Opcode, AMDGPU::OpName::src2), in FoldOperand()
2091 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_X), in FoldOperand()
2092 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Y), in FoldOperand()
2093 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_Z), in FoldOperand()
2094 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_W), in FoldOperand()
2095 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1_X), in FoldOperand()
[all …]
DR600InstrInfo.h263 int getOperandIdx(const MachineInstr &MI, unsigned Op) const;
268 int getOperandIdx(unsigned Opcode, unsigned Op) const;
DR600MachineScheduler.cpp360 int DstIndex = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); in AssignSlot()
DR600Instructions.td92 // and R600InstrInfo::getOperandIdx().
133 // R600InstrInfo::buildDefaultInstruction(), and R600InstrInfo::getOperandIdx().
173 // R600InstrInfo::getOperandIdx().