/external/apache-commons-math/src/main/java/org/apache/commons/math/linear/ |
D | EigenDecomposition.java | 77 RealMatrix getVT(); in getVT() method
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D | SingularValueDecomposition.java | 101 RealMatrix getVT(); in getVT() method
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D | SingularValueDecompositionImpl.java | 200 public RealMatrix getVT() throws InvalidMatrixException { in getVT() method in SingularValueDecompositionImpl 228 getVT().walkInOptimizedOrder(new DefaultRealMatrixPreservingVisitor() { in getCovariance()
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D | EigenDecompositionImpl.java | 183 public RealMatrix getVT() throws InvalidMatrixException { in getVT() method in EigenDecompositionImpl
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/external/llvm/lib/IR/ |
D | ValueTypes.cpp | 247 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT() function in MVT 267 getVT(VTy->getElementType(), false), VTy->getNumElements()); in getVT() 278 return MVT::getVT(Ty, HandleUnknown); in getEVT()
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/external/llvm/utils/TableGen/ |
D | DAGISelMatcherEmitter.cpp | 439 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", "; in EmitMatcher() 448 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", " in EmitMatcher() 459 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 463 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 532 OS << getEnumName(EN->getVT(i)) << ", "; in EmitMatcher()
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D | DAGISelMatcher.h | 837 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 862 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 888 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 1041 MVT::SimpleValueType getVT(unsigned i) const { in getVT() function
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/external/llvm/include/llvm/CodeGen/ |
D | MachineValueType.h | 590 static MVT getVT(Type *Ty, bool HandleUnknown = false);
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D | SelectionDAGNodes.h | 1811 EVT getVT() const { return ValueType; }
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 795 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 1025 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 1462 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT(); in SimplifySetCC() 1569 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1) in SimplifySetCC() 2339 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true); in ParseConstraints() 2347 OpInfo.ConstraintVT = MVT::getVT(OpTy, true); in ParseConstraints()
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D | LegalizeVectorOps.cpp | 327 QueryType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp() 769 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT(); in ExpandSEXTINREG()
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D | SelectionDAG.cpp | 806 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() 2150 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 2262 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 2428 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 2431 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 2447 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); in ComputeNumSignBits() 3316 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 3328 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. in getNode() 3340 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 3352 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() [all …]
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D | SelectionDAGDumper.cpp | 461 OS << ":" << N->getVT().getEVTString(); in print_details()
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D | LegalizeIntegerTypes.cpp | 907 cast<VTSDNode>(OpL->getOperand(1))->getVT() == NewLHS.getValueType() && in PromoteSetCCOperands() 909 cast<VTSDNode>(OpR->getOperand(1))->getVT() == NewRHS.getValueType()) { in PromoteSetCCOperands() 1748 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertSext() 1769 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertZext() 2244 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_SIGN_EXTEND_INREG()
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D | LegalizeVectorTypes.cpp | 262 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() 871 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT()); in SplitVecRes_InregOp() 2099 cast<VTSDNode>(N->getOperand(1))->getVT() in WidenVecRes_InregOp()
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D | SelectionDAGISel.cpp | 2422 if (cast<VTSDNode>(N)->getVT() == VT) in CheckValueType() 2426 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI->getPointerTy(); in CheckValueType()
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D | LegalizeDAG.cpp | 1200 EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp() 3009 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode() 3030 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
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D | DAGCombiner.cpp | 1737 if (TN->getVT() == MVT::i1) { in visitADD() 1913 if (TN->getVT() == MVT::i1) { in visitSUB() 6281 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ReduceLoadWidth() 6435 EVT EVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG() 6449 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG() 8141 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in visitFP_ROUND_INREG()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 426 EVT BVT = BaseType->getVT(); in LowerSIGN_EXTEND_INREG()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 630 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>; 631 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 6495 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 6508 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 8309 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth() 8310 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth() 8318 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth() 8319 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth()
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D | AArch64ISelDAGToDAG.cpp | 352 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT(); in getExtendTypeForNode()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 1433 if (T->getVT().getSizeInBits() == FromBits) { in isValueExtension()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 575 EVT ExtendTy = cast<VTSDNode>(Op0Op2)->getVT(); in performANDCombine() 918 EVT ExtendTy = cast<VTSDNode>(Op0Op0->getOperand(2))->getVT(); in performSRACombine()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 2250 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG()
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