| /external/llvm/test/CodeGen/AArch64/ |
| D | fp16-vector-load-store.ll | 4 define <4 x half> @load_64(<4 x half>* nocapture readonly %a) #0 {
8 %0 = load <4 x half>, <4 x half>* %a, align 8
9 ret <4 x half> %0
13 define <8 x half> @load_128(<8 x half>* nocapture readonly %a) #0 {
17 %0 = load <8 x half>, <8 x half>* %a, align 16
18 ret <8 x half> %0
22 define <4 x half> @load_dup_64(half* nocapture readonly %a) #0 {
26 %0 = load half, half* %a, align 2
27 %1 = insertelement <4 x half> undef, half %0, i32 0
28 %2 = shufflevector <4 x half> %1, <4 x half> undef, <4 x i32> zeroinitializer
[all …]
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| D | fp16-vector-shuffle.ll | 4 define <4 x half> @select_64(<4 x half> %a, <4 x half> %b, <4 x i16> %c) #0 {
8 %0 = bitcast <4 x half> %a to <4 x i16>
9 %1 = bitcast <4 x half> %b to <4 x i16>
14 %3 = bitcast <4 x i16> %vbsl5.i to <4 x half>
15 ret <4 x half> %3
19 define <8 x half> @select_128(<8 x half> %a, <8 x half> %b, <8 x i16> %c) #0 {
23 %0 = bitcast <8 x half> %a to <8 x i16>
24 %1 = bitcast <8 x half> %b to <8 x i16>
29 %3 = bitcast <8 x i16> %vbsl5.i to <8 x half>
30 ret <8 x half> %3
[all …]
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| D | f16-instructions.ll | 11 define half @test_fadd(half %a, half %b) #0 {
12 %r = fadd half %a, %b
13 ret half %r
22 define half @test_fsub(half %a, half %b) #0 {
23 %r = fsub half %a, %b
24 ret half %r
33 define half @test_fmul(half %a, half %b) #0 {
34 %r = fmul half %a, %b
35 ret half %r
44 define half @test_fdiv(half %a, half %b) #0 {
[all …]
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| D | fp16-vector-nvcast.ll | 4 define void @nvcast_v2i32(<4 x half>* %a) #0 {
9 store volatile <4 x half> <half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB>, <4 x half>* %a
15 define void @nvcast_v4i16(<4 x half>* %a) #0 {
20 store volatile <4 x half> <half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB>, <4 x half>* %a
26 define void @nvcast_v8i8(<4 x half>* %a) #0 {
31 store volatile <4 x half> <half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB>, <4 x half>* %a
37 define void @nvcast_f64(<4 x half>* %a) #0 {
42 store volatile <4 x half> zeroinitializer, <4 x half>* %a
47 define void @nvcast_v4i32(<8 x half>* %a) #0 {
52 …latile <8 x half> <half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH0…
[all …]
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| D | half.ll | 3 define void @test_load_store(half* %in, half* %out) {
7 %val = load half, half* %in
8 store half %val, half* %out
12 define i16 @test_bitcast_from_half(half* %addr) {
15 %val = load half, half* %addr
16 %val_int = bitcast half %val to i16
20 define i16 @test_reg_bitcast_from_half(half %in) {
26 %val = bitcast half %in to i16
30 define void @test_bitcast_to_half(half* %addr, i16 %in) {
33 %val_fp = bitcast i16 %in to half
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| D | fp16-v4-instructions.ll | 3 define <4 x half> @add_h(<4 x half> %a, <4 x half> %b) {
10 %0 = fadd <4 x half> %a, %b
11 ret <4 x half> %0
15 define <4 x half> @build_h4(<4 x half> %a) {
20 ret <4 x half> <half 0xH3CCD, half 0xH3CCD, half 0xH3CCD, half 0xH3CCD>
24 define <4 x half> @sub_h(<4 x half> %a, <4 x half> %b) {
31 %0 = fsub <4 x half> %a, %b
32 ret <4 x half> %0
36 define <4 x half> @mul_h(<4 x half> %a, <4 x half> %b) {
43 %0 = fmul <4 x half> %a, %b
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| D | fp16-vector-bitcast.ll | 3 define <4 x i16> @v4f16_to_v4i16(float, <4 x half> %a) #0 {
7 %1 = bitcast <4 x half> %a to <4 x i16>
11 define <2 x i32> @v4f16_to_v2i32(float, <4 x half> %a) #0 {
15 %1 = bitcast <4 x half> %a to <2 x i32>
19 define <1 x i64> @v4f16_to_v1i64(float, <4 x half> %a) #0 {
23 %1 = bitcast <4 x half> %a to <1 x i64>
27 define i64 @v4f16_to_i64(float, <4 x half> %a) #0 {
31 %1 = bitcast <4 x half> %a to i64
35 define <2 x float> @v4f16_to_v2float(float, <4 x half> %a) #0 {
39 %1 = bitcast <4 x half> %a to <2 x float>
[all …]
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| D | fp16-v8-instructions.ll | 3 define <8 x half> @add_h(<8 x half> %a, <8 x half> %b) {
38 %0 = fadd <8 x half> %a, %b
39 ret <8 x half> %0
43 define <8 x half> @sub_h(<8 x half> %a, <8 x half> %b) {
78 %0 = fsub <8 x half> %a, %b
79 ret <8 x half> %0
83 define <8 x half> @mul_h(<8 x half> %a, <8 x half> %b) {
118 %0 = fmul <8 x half> %a, %b
119 ret <8 x half> %0
123 define <8 x half> @div_h(<8 x half> %a, <8 x half> %b) {
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | fp16-promote.ll | 17 define void @test_fadd(half* %p, half* %q) #0 {
18 %a = load half, half* %p, align 2
19 %b = load half, half* %q, align 2
20 %r = fadd half %a, %b
21 store half %r, half* %p
35 define void @test_fsub(half* %p, half* %q) #0 {
36 %a = load half, half* %p, align 2
37 %b = load half, half* %q, align 2
38 %r = fsub half %a, %b
39 store half %r, half* %p
[all …]
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| D | half.ll | 5 define void @test_load_store(half* %in, half* %out) {
9 %val = load half, half* %in
10 store half %val, half* %out
14 define i16 @test_bitcast_from_half(half* %addr) {
17 %val = load half, half* %addr
18 %val_int = bitcast half %val to i16
22 define void @test_bitcast_to_half(half* %addr, i16 %in) {
25 %val_fp = bitcast i16 %in to half
26 store half %val_fp, half* %addr
30 define float @test_extend32(half* %addr) {
[all …]
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| /external/clang/test/SemaOpenCL/ |
| D | half.cl | 5 half half_disabled(half *p, // expected-error{{declaring function return value of type 'half' is no…
6 … half h) // expected-error{{declaring function parameter of type 'half' is not allowed}}
8 half a[2]; // expected-error{{declaring variable of type 'half [2]' is not allowed}}
9 half b; // expected-error{{declaring variable of type 'half' is not allowed}}
10 *p; // expected-error{{loading directly from pointer to type 'half' is not allowed}}
11 p[1]; // expected-error{{loading directly from pointer to type 'half' is not allowed}}
14 b = (half) c; // expected-error{{casting to type 'half' is not allowed}}
16 half *allowed = &p[1];
17 half *allowed2 = &*p;
18 half *allowed3 = p + 1;
[all …]
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| /external/llvm/test/CodeGen/Mips/ |
| D | fp16-promote.ll | 8 define void @test_fadd(half* %p, half* %q) #0 {
9 %a = load half, half* %p, align 2
10 %b = load half, half* %q, align 2
11 %r = fadd half %a, %b
12 store half %r, half* %p
18 define float @test_fpext_float(half* %p) {
19 %a = load half, half* %p, align 2
20 %r = fpext half %a to float
27 define double @test_fpext_double(half* %p) {
28 %a = load half, half* %p, align 2
[all …]
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| /external/llvm/test/CodeGen/NVPTX/ |
| D | half.ll | 3 define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) {
7 %val = load half, half addrspace(1)* %in
8 store half %val, half addrspace(1) * %out
12 define void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) {
16 %val = load half, half addrspace(1) * %in
17 %val_int = bitcast half %val to i16
22 define void @test_bitcast_to_half(half addrspace(1)* %out, i16 addrspace(1)* %in) {
27 %val_fp = bitcast i16 %val to half
28 store half %val_fp, half addrspace(1)* %out
32 define void @test_extend32(half addrspace(1)* %in, float addrspace(1)* %out) {
[all …]
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| /external/llvm/test/CodeGen/R600/ |
| D | half.ll | 4 define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) {
8 %val = load half, half addrspace(1)* %in
9 store half %val, half addrspace(1) * %out
13 define void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) {
17 %val = load half, half addrspace(1) * %in
18 %val_int = bitcast half %val to i16
23 define void @test_bitcast_to_half(half addrspace(1)* %out, i16 addrspace(1)* %in) {
28 %val_fp = bitcast i16 %val to half
29 store half %val_fp, half addrspace(1)* %out
33 define void @test_extend32(half addrspace(1)* %in, float addrspace(1)* %out) {
[all …]
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| /external/llvm/test/CodeGen/X86/ |
| D | half.ll | 6 define void @test_load_store(half* %in, half* %out) {
10 %val = load half, half* %in
11 store half %val, half* %out
15 define i16 @test_bitcast_from_half(half* %addr) {
18 %val = load half, half* %addr
19 %val_int = bitcast half %val to i16
23 define void @test_bitcast_to_half(half* %addr, i16 %in) {
26 %val_fp = bitcast i16 %in to half
27 store half %val_fp, half* %addr
31 define float @test_extend32(half* %addr) {
[all …]
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| /external/llvm/test/Assembler/ |
| D | half-constprop.ll | 3 ; Testing half constant propagation.
5 define half @abc() nounwind {
7 %a = alloca half, align 2
8 %b = alloca half, align 2
10 store half 0xH4200, half* %a, align 2
11 store half 0xH4B9A, half* %b, align 2
12 %tmp = load half, half* %a, align 2
13 %tmp1 = load half, half* %b, align 2
14 %add = fadd half %tmp, %tmp1
16 ret half %add
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| /external/llvm/test/CodeGen/Mips/msa/ |
| D | 2rf_exup.ll | 7 …8 x half> <half 0.000000e+00, half 1.000000e+00, half 2.000000e+00, half 3.000000e+00, half 4.0000…
12 %0 = load <8 x half>, <8 x half>* @llvm_mips_fexupl_w_ARG1
13 %1 = tail call <4 x float> @llvm.mips.fexupl.w(<8 x half> %0)
18 declare <4 x float> @llvm.mips.fexupl.w(<8 x half>) nounwind
45 …8 x half> <half 0.000000e+00, half 1.000000e+00, half 2.000000e+00, half 3.000000e+00, half 4.0000…
50 %0 = load <8 x half>, <8 x half>* @llvm_mips_fexupr_w_ARG1
51 %1 = tail call <4 x float> @llvm.mips.fexupr.w(<8 x half> %0)
56 declare <4 x float> @llvm.mips.fexupr.w(<8 x half>) nounwind
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| D | 3rf_exdo.ll | 9 …8 x half> <half 0.000000e+00, half 0.000000e+00, half 0.000000e+00, half 0.000000e+00, half 0.0000…
15 %2 = tail call <8 x half> @llvm.mips.fexdo.h(<4 x float> %0, <4 x float> %1)
16 store <8 x half> %2, <8 x half>* @llvm_mips_fexdo_h_RES
20 declare <8 x half> @llvm.mips.fexdo.h(<4 x float>, <4 x float>) nounwind
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| /external/clang/test/CodeGenOpenCL/ |
| D | half.cl | 6 half test()
8 half x = 0.1f;
11 half y = x + x;
12 half z = y * 1.0f;
14 // CHECK: half 0xH3260
17 // CHECK-LABEL: @test_inc(half %x)
18 // CHECK: [[INC:%.*]] = fadd half %x, 0xH3C00
19 // CHECK: ret half [[INC]]
20 half test_inc(half x)
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| /external/eigen/test/ |
| D | sparseLM.cpp | 38 int half = n/2; in model() local
39 VectorBlock<const VectorType> u(uv, 0, half); in model()
40 VectorBlock<const VectorType> v(uv, half, half); in model()
44 for (int i = 0; i < half; i++) in model()
65 int half = n/2; in operator ()() local
66 VectorBlock<const VectorType> u(uv, 0, half); in operator ()()
67 VectorBlock<const VectorType> v(uv, half, half); in operator ()()
72 for (int i = 0; i < half; i++) in operator ()()
90 int half = n/2; in df() local
91 VectorBlock<const VectorType> u(uv, 0, half); in df()
[all …]
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| D | denseLM.cpp | 39 int half = n/2; in model() local
40 VectorBlock<const VectorType> u(uv, 0, half); in model()
41 VectorBlock<const VectorType> v(uv, half, half); in model()
44 for (int i = 0; i < half; i++) in model()
64 int half = n/2; in operator ()() local
65 VectorBlock<const VectorType> u(uv, 0, half); in operator ()()
66 VectorBlock<const VectorType> v(uv, half, half); in operator ()()
70 for (int i = 0; i < half; i++) in operator ()()
85 int half = n/2; in df() local
86 VectorBlock<const VectorType> u(uv, 0, half); in df()
[all …]
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | int-add-01.ll | 11 %half = load i16 , i16 *%src
12 %rhs = sext i16 %half to i32
23 %half = load i16 , i16 *%ptr
24 %rhs = sext i16 %half to i32
35 %half = load i16 , i16 *%ptr
36 %rhs = sext i16 %half to i32
47 %half = load i16 , i16 *%ptr
48 %rhs = sext i16 %half to i32
61 %half = load i16 , i16 *%ptr
62 %rhs = sext i16 %half to i32
[all …]
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| D | int-mul-01.ll | 11 %half = load i16 , i16 *%src
12 %rhs = sext i16 %half to i32
23 %half = load i16 , i16 *%ptr
24 %rhs = sext i16 %half to i32
35 %half = load i16 , i16 *%ptr
36 %rhs = sext i16 %half to i32
47 %half = load i16 , i16 *%ptr
48 %rhs = sext i16 %half to i32
61 %half = load i16 , i16 *%ptr
62 %rhs = sext i16 %half to i32
[all …]
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| D | int-sub-07.ll | 11 %half = load i16 , i16 *%src
12 %rhs = sext i16 %half to i32
23 %half = load i16 , i16 *%ptr
24 %rhs = sext i16 %half to i32
35 %half = load i16 , i16 *%ptr
36 %rhs = sext i16 %half to i32
47 %half = load i16 , i16 *%ptr
48 %rhs = sext i16 %half to i32
61 %half = load i16 , i16 *%ptr
62 %rhs = sext i16 %half to i32
[all …]
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| /external/llvm/test/Bitcode/ |
| D | binaryFloatInstructions.3.2.ll | 8 define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
16 ; CHECK-NEXT: %res3 = fadd half %x3, %x3
17 %res3 = fadd half %x3, %x3
71 define void @faddHalfVec(<2 x half> %x1, <3 x half> %x2 ,<4 x half> %x3, <8 x half> %x4, <16 x half…
73 ; CHECK: %res1 = fadd <2 x half> %x1, %x1
74 %res1 = fadd <2 x half> %x1, %x1
76 ; CHECK-NEXT: %res2 = fadd <3 x half> %x2, %x2
77 %res2 = fadd <3 x half> %x2, %x2
79 ; CHECK-NEXT: %res3 = fadd <4 x half> %x3, %x3
80 %res3 = fadd <4 x half> %x3, %x3
[all …]
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