Searched refs:hasMips32r6 (Results 1 – 11 of 11) sorted by relevance
192 bool hasMips32r6() const { in hasMips32r6() function269 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
107 if (hasMips32r6()) { in MipsSubtarget()
277 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR; in expandToLongBranch()
213 if (Subtarget.hasMips32r6()) in MipsTargetLowering()1042 LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; in emitAtomicBinary()1043 SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; in emitAtomicBinary()1586 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND()1606 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT()1632 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
108 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
987 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
155 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()534 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDECombine()1263 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
169 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">,171 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
158 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
44 bool hasMips32r6() const { in hasMips32r6() function in __anon528cdaf40111::MipsDisassembler865 if (hasMips32r6() && isGP64()) { in getInstruction()875 if (hasMips32r6()) { in getInstruction()
418 bool hasMips32r6() const { in hasMips32r6() function in __anond0efcad40211::MipsAsmParser1310 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { in processInstruction()