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Searched refs:isLittle (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsTargetMachine.cpp49 bool isLittle) { in computeDataLayout() argument
55 if (isLittle) in computeDataLayout()
90 CodeGenOpt::Level OL, bool isLittle) in MipsTargetMachine() argument
91 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in MipsTargetMachine()
93 isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()), in MipsTargetMachine()
95 Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this), in MipsTargetMachine()
97 isLittle, *this), in MipsTargetMachine()
99 isLittle, *this) { in MipsTargetMachine()
162 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this); in getSubtargetImpl()
DMipsTargetMachine.h30 bool isLittle; variable
44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
67 bool isLittleEndian() const { return isLittle; } in isLittleEndian()
DMipsSEFrameLowering.cpp301 if (!Subtarget.isLittle()) in expandBuildPairF64()
340 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N)); in expandExtractElementF64()
437 if (!STI.isLittle()) in emitPrologue()
453 if (!STI.isLittle()) in emitPrologue()
DMipsCallingConv.td127 CCIfSubtargetNot<"isLittle()",
163 CCIfSubtargetNot<"isLittle()",
195 CCIfSubtarget<"isLittle()",
197 CCIfSubtargetNot<"isLittle()",
DMipsSubtarget.h204 bool isLittle() const { return IsLittle; } in isLittle() function
DMipsISelLowering.cpp1214 if (Subtarget.isLittle()) { in emitAtomicBinaryPartword()
1456 if (Subtarget.isLittle()) { in emitAtomicCmpSwapPartword()
1862 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) { in lowerVAARG()
2149 bool IsLittle = Subtarget.isLittle(); in lowerLOAD()
2270 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle()); in lowerSTORE()
2337 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2610 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(), in LowerCall()
2631 if (!Subtarget.isLittle()) in LowerCall()
2972 if (!Subtarget.isLittle()) in LowerFormalArguments()
3620 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, in passByValArg() argument
[all …]
DMipsAsmPrinter.cpp499 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; in PrintAsmOperand()
502 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1; in PrintAsmOperand()
DMipsSEISelDAGToDAG.cpp489 !Subtarget->isLittle())) in selectVSplat()
887 !Subtarget->isLittle())) in selectNode()
DMipsSEISelLowering.cpp682 bool IsLittleEndian = !Subtarget.isLittle(); in performORCombine()
862 EltSize, !Subtarget.isLittle()) || in performDSPShiftCombine()
1221 if (!Subtarget.isLittle()) in lowerLOAD()
1244 if (!Subtarget.isLittle()) in lowerSTORE()
1627 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN()
1663 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN()
2333 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR()
DMipsISelLowering.h444 const ISD::ArgFlagsTy &Flags, bool isLittle,
DMipsFastISel.cpp1054 if (ArgSize < 8 && !Subtarget->isLittle()) in processCallArgs()
DMipsInstrInfo.td199 def IsLE : Predicate<"Subtarget->isLittle()">;
200 def IsBE : Predicate<"!Subtarget->isLittle()">;
/external/llvm/lib/Target/ARM/
DARMTargetMachine.cpp120 bool isLittle) { in computeDataLayout() argument
125 if (isLittle) in computeDataLayout()
178 CodeGenOpt::Level OL, bool isLittle) in ARMBaseTargetMachine() argument
179 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in ARMBaseTargetMachine()
183 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) { in ARMBaseTargetMachine()
222 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle); in getSubtargetImpl()
238 CodeGenOpt::Level OL, bool isLittle) in ARMTargetMachine() argument
239 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ARMTargetMachine()
270 CodeGenOpt::Level OL, bool isLittle) in ThumbTargetMachine() argument
272 isLittle) { in ThumbTargetMachine()
DARMTargetMachine.h35 bool isLittle; variable
44 bool isLittle);
49 bool isLittleEndian() const { return isLittle; } in isLittleEndian()
69 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
102 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
DARMSubtarget.h423 bool isLittle() const { return IsLittle; } in isLittle() function
DARMISelLowering.cpp1368 if (!Subtarget->isLittle()) in LowerCallResult()
1385 if (!Subtarget->isLittle()) in LowerCallResult()
1437 unsigned id = Subtarget->isLittle() ? 0 : 1; in PassF64ArgInRegs()
2194 bool isLittleEndian = Subtarget->isLittle(); in LowerReturn()
2826 if (!Subtarget->isLittle()) in GetF64FormalArgument()
11163 if (!Subtarget->isLittle()) in emitLoadLinked()
11197 if (!Subtarget->isLittle()) in emitStoreConditional()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMAsmBackendELF.h22 return createARMELFObjectWriter(OS, OSABI, isLittle()); in createObjectWriter()
DARMAsmBackend.h67 bool isLittle() const { return IsLittleEndian; } in isLittle() function
DARMAsmBackend.cpp749 StringRef CPU, bool isLittle) { in createARMAsmBackend() argument
776 return new ARMAsmBackendELF(T, TT, OSABI, isLittle); in createARMAsmBackend()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCAsmBackend.cpp79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), in PPCAsmBackend() argument
80 IsLittleEndian(isLittle) {} in PPCAsmBackend()
/external/llvm/lib/Target/AArch64/
DAArch64TargetMachine.h49 bool isLittle;
DAArch64TargetMachine.cpp135 isLittle(LittleEndian) { in AArch64TargetMachine()
159 I = llvm::make_unique<AArch64Subtarget>(TargetTriple, CPU, FS, *this, isLittle); in getSubtargetImpl()