/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 884 assert(isTypeLegal(VT)); in canOpTrap() 1050 while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) { in getVectorTypeBreakdownMVT() 1058 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT() 1083 if (isTypeLegal(*I)) in isLegalRC() 1214 if (isTypeLegal(IVT)) { in computeRegisterProperties() 1224 if (!isTypeLegal(MVT::ppcf128)) { in computeRegisterProperties() 1233 if (!isTypeLegal(MVT::f128)) { in computeRegisterProperties() 1242 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1251 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties() 1258 if (!isTypeLegal(MVT::f16)) { in computeRegisterProperties() [all …]
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D | Analysis.cpp | 219 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
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D | CodeGenPrepare.cpp | 978 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(ShiftI->getType())); in OptimizeExtractBits() 1015 && (!TLI.isTypeLegal(TLI.getValueType(User->getType())))) in OptimizeExtractBits() 3680 (TLI->isTypeLegal(LoadVT) || !TLI->isTypeLegal(VT)) && in MoveExtToFormExtLoad()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ResourcePriorityQueue.cpp | 97 if (TLI->isTypeLegal(VT) in numberRCValPredInSU() 135 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU() 335 if (TLI->isTypeLegal(VT) in rawRegPressureDelta() 347 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta() 488 if (TLI->isTypeLegal(VT)) { in scheduledNode() 499 if (TLI->isTypeLegal(VT)) { in scheduledNode()
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D | FastISel.cpp | 177 if (!TLI.isTypeLegal(VT)) { in getRegForValue() 391 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp() 1236 if (!TLI.isTypeLegal(DstVT)) in selectCast() 1240 if (!TLI.isTypeLegal(SrcVT)) in selectCast() 1273 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast() 1408 if (!TLI.isTypeLegal(IntVT)) in selectFNeg() 1442 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue() 2013 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
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D | LegalizeTypesGeneric.cpp | 107 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 117 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 354 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST()
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D | LegalizeVectorTypes.cpp | 1134 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp() 1135 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp() 1854 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_BinaryCanTrap() 1898 } while (!TLI.isTypeLegal(VT) && NumElts != 1); in WidenVecRes_BinaryCanTrap() 1937 } while (!TLI.isTypeLegal(NextVT)); in WidenVecRes_BinaryCanTrap() 2011 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert() 2171 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST() 2311 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_CONVERT_RNDSAT() 2686 if (TLI.isTypeLegal(FixedVT) && in WidenVecOp_EXTEND() 2762 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST() [all …]
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D | LegalizeTypes.cpp | 131 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(I)) { in PerformExpensiveChecks() 419 if (!isTypeLegal(I->getValueType(i))) { in run() 427 !isTypeLegal(I->getOperand(i).getValueType())) { in run()
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D | LegalizeIntegerTypes.cpp | 207 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap() 573 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_SETCC() 1000 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR() 1136 if (!TLI.isTypeLegal(DataVT)) { in PromoteIntOp_MSTORE() 1139 if (!TLI.isTypeLegal(MaskVT)) in PromoteIntOp_MSTORE() 2138 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift() 2618 if (TLI.isTypeLegal(LHSLo.getValueType()) && in IntegerExpandSetCCOperands() 2619 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands() 2625 if (TLI.isTypeLegal(LHSHi.getValueType()) && in IntegerExpandSetCCOperands() 2626 TLI.isTypeLegal(RHSHi.getValueType())) in IntegerExpandSetCCOperands()
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D | LegalizeDAG.cpp | 306 if (TLI.isTypeLegal(intVT)) { in ExpandUnalignedStore() 426 if (TLI.isTypeLegal(intVT) && TLI.isTypeLegal(LoadedVT)) { in ExpandUnalignedLoad() 655 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore() 665 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore() 672 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore() 855 assert(TLI.isTypeLegal(StVT) && in LegalizeStoreOps() 1097 if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps() 1568 if (TLI.isTypeLegal(IVT)) { in ExpandFCOPYSIGN() 2414 if (Op0.getValueType() == MVT::i32 && TLI.isTypeLegal(MVT::f64)) { in ExpandLegalINT_TO_FP() 3154 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode() [all …]
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D | DAGCombiner.cpp | 431 bool isTypeLegal(const EVT &VT) { in isTypeLegal() function in __anonbfbf49f20111::DAGCombiner 433 return TLI.isTypeLegal(VT); in isTypeLegal() 2572 TLI.isTypeLegal(Op0VT))) && in SimplifyBinOpWithSameOpcodeHands() 3496 TLI.isTypeLegal(VT) && in visitOR() 3764 if (!TLI.isTypeLegal(VT)) return nullptr; in MatchRotate() 5318 (!LegalTypes || (!LegalOperations && TLI.isTypeLegal(SVT))) && in tryToFoldExtendOfConstant() 6614 if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) { in visitTRUNCATE() 6888 if (isTypeLegal(IntXVT)) { in visitBITCAST() 8145 if (N0CFP && isTypeLegal(EVT)) { in visitFP_ROUND_INREG() 9278 if (!TLI.isTypeLegal(SliceType)) in isLegal() [all …]
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D | InstrEmitter.cpp | 107 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg() 226 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters()
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D | TargetLowering.cpp | 1494 isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) { in SimplifySetCC() 1666 (isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) && in SimplifySetCC() 2681 if (!isTypeLegal(VT)) in BuildSDIV() 2738 if (!isTypeLegal(VT)) in BuildUDIV()
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 105 bool isTypeLegal(Type *Ty, MVT &VT); 454 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel 463 return TLI.isTypeLegal(VT); in isTypeLegal() 470 if (isTypeLegal(Ty, VT)) in isTypeSupported() 482 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal() 905 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt() 913 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt() 1124 else if (!isTypeLegal(CLI.RetTy, RetVT)) in fastLowerCall() 1137 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 391 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 545 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrCustom() 554 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegalOrPromote() 563 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand() 568 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal() 613 return isTypeLegal(ValVT) && MemVT.isSimple() && in isTruncStoreLegal() 697 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 2182 return isTypeLegal(VT); in isTypeDesirableForOp()
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/external/llvm/include/llvm/Analysis/ |
D | TargetTransformInfo.h | 334 bool isTypeLegal(Type *Ty) const; 550 virtual bool isTypeLegal(Type *Ty) = 0; 671 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); } in isTypeLegal() function
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D | TargetTransformInfoImpl.h | 232 bool isTypeLegal(Type *Ty) { return false; } in isTypeLegal() function
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 159 bool isTypeLegal(Type *Ty, MVT &VT, bool AllowI1 = false); 261 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic() 301 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal() function in X86FastISel 321 return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT); in isTypeLegal() 931 if (!isTypeLegal(Val->getType(), VT, /*AllowI1=*/true)) in X86SelectStore() 1087 if (!isTypeLegal(LI->getType(), VT, /*AllowI1=*/true)) in X86SelectLoad() 1194 if (!isTypeLegal(I->getOperand(0)->getType(), VT)) in X86SelectCmp() 1286 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt() 1433 isTypeLegal(TI->getOperand(0)->getType(), SourceVT)) { in X86SelectBranch() 1548 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift() [all …]
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/external/llvm/lib/Analysis/ |
D | TargetTransformInfo.cpp | 134 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo 135 return TTIImpl->isTypeLegal(Ty); in isTypeLegal()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 145 bool isTypeLegal(Type *Ty, MVT &VT); 260 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel 269 return TLI.isTypeLegal(VT); in isTypeLegal() 275 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 966 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP() 1075 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI() 1087 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI() 1448 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall() 1494 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 169 bool isTypeLegal(Type *Ty, MVT &VT); 734 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel 743 return TLI.isTypeLegal(VT); in isTypeLegal() 747 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1556 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP() 1600 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI() 1628 if (!isTypeLegal(I->getType(), VT)) in SelectSelect() 1705 if (!isTypeLegal(Ty, VT)) in SelectDiv() 1733 if (!isTypeLegal(Ty, VT)) in SelectRem() 2197 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall() [all …]
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D | ARMISelLowering.cpp | 3286 if (!DAG.getTargetLoweringInfo().isTypeLegal(Op.getValueType())) in LowerXALUO() 3316 if (!DAG.getTargetLoweringInfo().isTypeLegal(Cond->getValueType(0))) in LowerSELECT() 4023 if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) { in ExpandBITCAST() 4033 if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) { in ExpandBITCAST() 8190 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformANDCombine() 8233 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformORCombine() 8273 DAG.getTargetLoweringInfo().isTypeLegal(VT)) { in PerformORCombine() 8427 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in PerformXORCombine() 8636 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine() 8722 if (!TLI.isTypeLegal(VT) || in PerformVECTOR_SHUFFLECombine() [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | BasicTTIImpl.h | 155 bool isTypeLegal(Type *Ty) { in isTypeLegal() function 157 return getTLI()->isTypeLegal(VT); in isTypeLegal() 195 return TLI->isTypeLegal(VT) && in haveFastSqrt()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 139 bool isTypeLegal(Type *Ty, MVT &VT); 482 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero() 904 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in AArch64FastISel 918 return TLI.isTypeLegal(VT); in isTypeLegal() 929 if (isTypeLegal(Ty, VT)) in isTypeSupported() 2744 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt() 2777 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectIntToFP() 3087 else if (!isTypeLegal(CLI.RetTy, RetVT)) in fastLowerCall() 3100 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall() 3251 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic() [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 2198 && (!hasHardQuad || !TLI.isTypeLegal(VT))) { in LowerFP_TO_SINT() 2206 if (!TLI.isTypeLegal(VT)) in LowerFP_TO_SINT() 2229 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP() 2237 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP() 2255 (hasHardQuad && TLI.isTypeLegal(VT))) in LowerFP_TO_UINT() 2276 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
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