Searched refs:line_size_bits (Results 1 – 2 of 2) sorted by relevance
47 Int line_size_bits; member64 c->line_size_bits = VG_(log2)(c->line_size); in cachesim_initcache()65 c->tag_shift = c->line_size_bits + VG_(log2)(c->sets); in cachesim_initcache()129 UWord block1 = a >> c->line_size_bits; in cachesim_ref_is_miss()130 UWord block2 = (a+size-1) >> c->line_size_bits; in cachesim_ref_is_miss()193 UWord block = a >> I1.line_size_bits; in cachesim_I1_doref_NoX()228 if (I1.line_size_bits != LL.line_size_bits) return False; in cachesim_is_IrNoX()229 block1 = a >> I1.line_size_bits; in cachesim_is_IrNoX()230 block2 = (a+size-1) >> I1.line_size_bits; in cachesim_is_IrNoX()
76 int line_size_bits; member185 c->line_size_bits = VG_(log2)(c->line_size); in cachesim_initcache()186 c->tag_shift = c->line_size_bits + VG_(log2)(c->sets); in cachesim_initcache()286 UWord block1 = a >> c->line_size_bits; in cachesim_ref()287 UWord block2 = (a+size-1) >> c->line_size_bits; in cachesim_ref()395 UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1); in cachesim_ref_wb()396 UInt set2 = ((a+size-1) >> c->line_size_bits) & (c->sets_min_1); in cachesim_ref_wb()497 UInt block = ( a >> LL.line_size_bits); in prefetch_LL_doref()689 UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \690 UInt set2 = ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); \[all …]