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Searched refs:offset1 (Results 1 – 25 of 57) sorted by relevance

123

/external/valgrind/none/tests/s390x/
Dclc.c36 void multiplex(int l, long offset1, long offset2) in multiplex() argument
38 testrun(b1 + offset1, b1 + offset2, l); in multiplex()
39 testrun(b1 + offset1, b2 + offset2, l); in multiplex()
40 testrun(b1 + offset1, b3 + offset2, l); in multiplex()
41 testrun(b1 + offset1, b4 + offset2, l); in multiplex()
42 testrun(b2 + offset1, b2 + offset2, l); in multiplex()
43 testrun(b2 + offset1, b3 + offset2, l); in multiplex()
44 testrun(b2 + offset1, b4 + offset2, l); in multiplex()
45 testrun(b3 + offset1, b3 + offset2, l); in multiplex()
46 testrun(b3 + offset1, b4 + offset2, l); in multiplex()
[all …]
/external/proguard/src/proguard/optimize/peephole/
DGotoCommonCodeReplacer.java157 private int commonByteCodeCount(CodeAttribute codeAttribute, int offset1, int offset2) in commonByteCodeCount() argument
165 delta <= offset1 && in commonByteCodeCount()
167 offset2 - delta != offset1; in commonByteCodeCount()
170 int newOffset1 = offset1 - delta; in commonByteCodeCount()
241 private boolean exceptionBoundary(CodeAttribute codeAttribute, int offset1, int offset2) in exceptionBoundary() argument
244 if (offset2 < offset1) in exceptionBoundary()
246 int offset = offset1; in exceptionBoundary()
247 offset1 = offset2; in exceptionBoundary()
252 for (int offset = offset1; offset <= offset2; offset++) in exceptionBoundary()
/external/llvm/test/MC/R600/
Dds-err.s14 ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
22 ds_write2_b32 v2, v4, v6 offset1:1000000000
Dds.s18 ds_write2_b32 v2, v4, v6 offset0:4 offset1:8
21 ds_write2_b32 v2, v4, v6 offset1:8
27 ds_read2_b32 v[8:9], v2 offset0:4 offset1:8
30 ds_read2_b32 v[8:9], v2 offset1:8
/external/icu/icu4c/source/samples/layout/
Dcmaps.cpp64 le_uint32 offset1 = 0, offset10 = 0; in createUnicodeMapper() local
72 offset1 = SWAPL(esh->encodingOffset); in createUnicodeMapper()
86 } else if (offset1 != 0) { in createUnicodeMapper()
87 subtable = (const CMAPEncodingSubtable *) ((const char *) cmap + offset1); in createUnicodeMapper()
/external/llvm/test/CodeGen/R600/
Dds_write2.ll10 ; SI: ds_write2_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:8
28 ; SI: ds_write2_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:8
87 ; SI: ds_write2_b32 [[VPTR]], v[[VAL0]], v[[VAL1]] offset1:8
108 ; SI: ds_write2_b32 [[VPTR]], v[[VAL0]], v[[VAL1]] offset1:8
127 ; SI: ds_write2_b32 [[VPTR]], v[[VAL0]], v[[VAL1]] offset1:8
147 ; SI: ds_write2_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
182 ; SI: ds_write2_b32 [[BASEADDR:v[0-9]+]], [[VAL0:v[0-9]+]], [[VAL1:v[0-9]+]] offset1:8
183 ; SI-NEXT: ds_write2_b32 [[BASEADDR]], [[VAL0]], [[VAL1]] offset0:11 offset1:27
212 ; SI: ds_write2_b32 [[BASEADDR:v[0-9]+]], [[VAL0:v[0-9]+]], [[VAL1:v[0-9]+]] offset0:3 offset1:8
213 ; SI-NEXT: ds_write2_b32 [[BASEADDR]], [[VAL0]], [[VAL1]] offset0:11 offset1:27
[all …]
Dds_read2_offset_order.ll11 ; SI: ds_read2st64_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset0:0 offset1:4
12 ; SI: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset0:2 offset1:3
13 ; SI: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset0:11 offset1:1
Dds_read2.ll10 ; SI: ds_read2_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:8
29 ; SI: ds_read2_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:255
66 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]] offset1:8
67 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]] offset0:11 offset1:27
97 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]] offset1:8
99 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]] offset0:11 offset1:27
133 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]] offset0:2 offset1:8
134 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]] offset0:11 offset1:27
316 ; SI: ds_read2_b64 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, [[VPTR]] offset1:8
334 ; SI: ds_read2_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:255
[all …]
Dds_write2st64.ll10 ; SI: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1
28 ; SI: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5
49 ; SI: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
69 ; SI: ds_write2st64_b64 [[VPTR]], [[VAL0]], [[VAL1]] offset0:4 offset1:127
88 ; SI: ds_write2_b64 {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset1:8
Dds_read2st64.ll8 ; SI: ds_read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1
27 …s_read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:1 offset1:2
47 …read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:1 offset1:255
120 ; SI: ds_read2st64_b64 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1
139 …s_read2st64_b64 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:1 offset1:2
161 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset1:1
162 ; SI: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset0:128 offset1:129
179 …read2st64_b64 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:4 offset1:127
240 ; SI: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:8
Dscratch-buffer.ll65 %offset1 = load i32, i32 addrspace(1)* %offsetptr1
66 %scratchptr1 = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %offset1
67 store i32 %offset1, i32* %scratchptr1
Dunaligned-load-store.ll187 ; SI: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]}} offset0:8 offset1:9
198 ; SI: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]}} offset1:1
236 ; SI: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset0:8 offset1:9
246 ; SI: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1
Dds-negative-offset-addressing-mode-loop.ll21 ; CI-DAG: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[VADDR]] offset1:1
22 ; CI-DAG: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[VADDR]] offset0:32 offset1:33
/external/sfntly/cpp/src/test/
Dtest_utils.h44 int32_t offset1,
56 int32_t offset1,
/external/mesa3d/src/egl/wayland/wayland-drm/
Dwayland-drm.c73 int32_t offset1, int32_t stride1, in create_buffer() argument
91 buffer->offset[1] = offset1; in create_buffer()
143 int32_t offset1, int32_t stride1, in drm_create_planar_buffer() argument
163 offset0, stride0, offset1, stride1, offset2, stride2); in drm_create_planar_buffer()
/external/llvm/test/CodeGen/Mips/
Deh-return32.ll19 ; CHECK: sw $5, [[offset1:[0-9]+]]($sp)
37 ; CHECK: lw $5, [[offset1]]($sp)
61 ; CHECK: sw $5, [[offset1:[0-9]+]]($sp)
77 ; CHECK: lw $5, [[offset1]]($sp)
Deh-return64.ll20 ; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
38 ; CHECK: ld $5, [[offset1]]($sp)
64 ; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
80 ; CHECK: ld $5, [[offset1]]($sp)
/external/llvm/test/Transforms/LoopUnroll/
Druntime-loop4.ll18 %offset1 = getelementptr i32, i32* %addr1, i32 %iv1
19 store i32 %iv1, i32* %offset1, align 4
/external/llvm/test/Analysis/Delinearization/
Dmultidim_ivs_and_integer_offsets_3d.ll32 %offset1 = add nsw i64 %j, -4
33 %subscript1 = add i64 %offset1, %subscript0
Dmultidim_ivs_and_parameteric_offsets_3d.ll32 %offset1 = add nsw i64 %j, %q
33 %subscript1 = add i64 %offset1, %subscript0
/external/compiler-rt/lib/asan/
Dasan_interceptors.cc92 static inline bool RangesOverlap(const char *offset1, uptr length1, in RangesOverlap() argument
94 return !((offset1 + length1 <= offset2) || (offset2 + length2 <= offset1)); in RangesOverlap()
97 const char *offset1 = (const char*)_offset1; \
99 if (RangesOverlap(offset1, length1, offset2, length2)) { \
101 ReportStringFunctionMemoryRangesOverlap(name, offset1, length1, \
/external/eigen/Eigen/src/Core/products/
DGeneralMatrixVector.h145 Index offset1 = (FirstAligned && alignmentStep==1?3:1);
152 ptmp1 = pset1<RhsPacket>(alpha*rhs[(i+offset1)*rhsIncr]),
157 const LhsScalar *lhs0 = lhs + i*lhsStride, *lhs1 = lhs + (i+offset1)*lhsStride,
408 Index offset1 = (FirstAligned && alignmentStep==1?3:1);
418 const LhsScalar *lhs0 = lhs + i*lhsStride, *lhs1 = lhs + (i+offset1)*lhsStride,
511 res[(i+offset1)*resIncr] += alpha*tmp1;
/external/llvm/test/CodeGen/ARM/
Dldstrex.ll127 %offset1 = bitcast i8* %offset1_8 to i32*
128 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1)
129 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1)
/external/llvm/lib/Target/R600/
DVIInstrFormats.td21 bits<8> offset1;
24 let Inst{15-8} = offset1;
/external/llvm/test/DebugInfo/X86/
Ddebug-loc-offset.ll6 ; debug-loc-offset1.cc
120 !1 = !MDFile(filename: "debug-loc-offset1.cc", directory: "/llvm_cmake_gcc")
124 !5 = !MDFile(filename: "debug-loc-offset1.cc", directory: "/llvm_cmake_gcc")

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