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Searched refs:r30 (Results 1 – 25 of 34) sorted by relevance

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/external/valgrind/none/tests/ppc64/
Dldst_multiple.c30 register HWord_t r30 asm("r30");
99 r27, r28, r29, r30, r31); in test_lmw()
114 r27, r28, r29, r30, r31); in test_lmw()
/external/valgrind/none/tests/ppc32/
Dldst_multiple.c30 register HWord_t r30 asm("r30");
99 r27, r28, r29, r30, r31); in test_lmw()
114 r27, r28, r29, r30, r31); in test_lmw()
/external/llvm/test/CodeGen/PowerPC/
Dstack-realign.ll40 ; CHECK: .cfi_def_cfa_register r30
41 ; CHECK: .cfi_offset r30, -16
63 ; CHECK-FP: .cfi_def_cfa_register r30
65 ; CHECK-FP: .cfi_offset r30, -16
125 ; CHECK: .cfi_def_cfa_register r30
158 ; where r30 is saved.
185 ; CHECK: .cfi_def_cfa_register r30
202 ; CHECK-FP: .cfi_def_cfa_register r30
Dr31.ll6 …18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30}"() nounwind
D2007-11-16-landingpad-split.ll18 ; CHECK: .cfi_offset r30, -40
Dppc64-anyregcc.ll347 },~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}…
386 },~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}…
/external/valgrind/coregrind/
Dpub_core_basics.h90 UInt r30; /* Stack frame pointer or subroutine variable */ member
95 ULong r30; /* Stack frame pointer or subroutine variable */ member
Dm_libcassert.c198 (srP)->misc.MIPS32.r30 = (ULong)fp; \
223 (srP)->misc.MIPS64.r30 = (ULong)fp; \
/external/libunwind/src/ia64/
DGinstall_cursor.S119 ld8 r30 = [r3], 2*LOC_SIZE // r30 = loc[IA64_REG_FR30]
134 and r30 = -4, r30
145 ldf.fill f30 = [r30] // f30 restored (don't touch no more)
236 mov r30 = in3 // make backup-copy of new bsp
268 mov.m ar.bspstore = r30 // restore register backing-store
Ducontext_i.h67 #define rLC r30
/external/llvm/test/FileCheck/
Dsimple-var-capture.txt9 op4 r30, r18, r21
/external/valgrind/VEX/orig_ppc32/
Ddate.orig131 0x25471AA0: 93C102A8 stw r30,680(r1)
1098 0x2548085C: 93C10028 stw r30,40(r1)
1112 0x25480864: 7FC802A6 mflr r30
1385 0x25480A78: 817E04F0 lwz r11,1264(r30)
1736 0x25480B44: 83C10028 lwz r30,40(r1)
2457 0x25480CD8: 93C10028 stw r30,40(r1)
2464 0x25480CDC: 7FC802A6 mflr r30
2518 0x25480CFC: 817E0450 lwz r11,1104(r30)
2691 0x25480E28: 83C10028 lwz r30,40(r1)
2909 0x25471994: 93C10018 stw r30,24(r1)
[all …]
Dreturn0.orig131 0x25471AA0: 93C102A8 stw r30,680(r1)
1098 0x2548085C: 93C10028 stw r30,40(r1)
1112 0x25480864: 7FC802A6 mflr r30
1385 0x25480A78: 817E04F0 lwz r11,1264(r30)
1736 0x25480B44: 83C10028 lwz r30,40(r1)
2457 0x25480CD8: 93C10028 stw r30,40(r1)
2464 0x25480CDC: 7FC802A6 mflr r30
2518 0x25480CFC: 817E0450 lwz r11,1104(r30)
2691 0x25480E28: 83C10028 lwz r30,40(r1)
2909 0x25471994: 93C10018 stw r30,24(r1)
[all …]
/external/valgrind/coregrind/m_dispatch/
Ddispatch-tilegx-linux.S86 st_add r29, r30, 8
148 ld_add r30, r29, 8
/external/valgrind/docs/internals/
Dregister-uses.txt80 r30 y altivec spill temporary
156 r30(LR) y
236 r30 y altivec spill temporary
287 r30 y y
/external/valgrind/VEX/auxprogs/
Dgenoffsets.c225 GENOFFSET(MIPS32,mips32,r30); in foo()
262 GENOFFSET(MIPS64,mips64,r30); in foo()
299 GENOFFSET(TILEGX,tilegx,r30); in foo()
/external/llvm/test/MC/PowerPC/
Dppc64-regs.s36 #CHECK: .cfi_offset r30, 248
153 .cfi_offset r30,248
/external/llvm/test/DebugInfo/SystemZ/
Deh_frame.s67 # DW_CFA_offset: r30 at cfa-184
/external/llvm/test/CodeGen/Mips/msa/
Dspill.ll105 %r30 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r29, <16 x i8> %30)
106 %r31 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r30, <16 x i8> %31)
254 %r30 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %r29, <8 x i16> %30)
255 %r31 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %r30, <8 x i16> %31)
403 %r30 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %r29, <4 x i32> %30)
404 %r31 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %r30, <4 x i32> %31)
552 %r30 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %r29, <2 x i64> %30)
553 %r31 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %r30, <2 x i64> %31)
/external/antlr/antlr-3.4/runtime/Python/tests/
Dt042ast.g142 r30
/external/boringssl/src/ssl/test/runner/
Dpoly1305.go227 r30 := uint32(r[12])
228 r30 &= 252
246 r3 += int64(r30)
/external/antlr/antlr-3.4/runtime/JavaScript/tests/functional/
Dt042ast.g148 r30
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td86 def R30 : Ri<30, "r30", ["fp"]>, DwarfRegNum<[30]>;
/external/libcxxabi/src/Unwind/
DUnwindRegistersRestore.S137 lwz r30,128(r3)
DUnwindRegistersSave.S131 stw r30,128(r3)

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