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Searched refs:reg_size (Results 1 – 25 of 38) sorted by relevance

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/external/v8/src/arm64/
Dassembler-arm64-inl.h59 return reg_size; in SizeInBits()
66 return reg_size / 8; in SizeInBytes()
72 return reg_size == 32; in Is32Bits()
78 return reg_size == 64; in Is64Bits()
95 ((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)) && in IsValidRegister()
102 ((reg_size == kSRegSizeInBits) || (reg_size == kDRegSizeInBits)) && in IsValidFPRegister()
110 DCHECK((reg_type != kNoRegister) || (reg_size == 0)); in IsNone()
118 return Aliases(other) && (reg_size == other.reg_size); in Is()
139 return (reg_size == other.reg_size) && (reg_type == other.reg_type); in IsSameSizeAndType()
1067 Instr Assembler::ImmS(unsigned imms, unsigned reg_size) {
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Dinstructions-arm64.cc77 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, in RepeatBitsAcrossReg() argument
82 DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)); in RepeatBitsAcrossReg()
84 for (unsigned i = width; i < reg_size; i *= 2) { in RepeatBitsAcrossReg()
95 unsigned reg_size = SixtyFourBits() ? kXRegSizeInBits : kWRegSizeInBits; in ImmLogical() local
134 return RepeatBitsAcrossReg(reg_size, in ImmLogical()
Dassembler-arm64.h89 unsigned reg_size; member
101 reg_size = 0; in Register()
107 reg_size = r.reg_size; in Register()
114 reg_size = r.reg_size; in Register()
230 reg_size = 0; in FPRegister()
236 reg_size = r.reg_size; in FPRegister()
243 reg_size = r.reg_size; in FPRegister()
1280 unsigned reg_size = rd.SizeInBits(); in lsl() local
1281 DCHECK(shift < reg_size); in lsl()
1282 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl()
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Ddisasm-arm64.cc235 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits in VisitLogicalImmediate() local
237 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) { in VisitLogicalImmediate()
260 bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) { in IsMovzMovnImm() argument
261 DCHECK((reg_size == kXRegSizeInBits) || in IsMovzMovnImm()
262 ((reg_size == kWRegSizeInBits) && (value <= 0xffffffff))); in IsMovzMovnImm()
273 if ((reg_size == kXRegSizeInBits) && in IsMovzMovnImm()
280 if ((reg_size == kWRegSizeInBits) && in IsMovzMovnImm()
1498 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits in SubstituteBitfieldImmediateField() local
1500 AppendToOutput("#%d", reg_size - r); in SubstituteBitfieldImmediateField()
Ddisasm-arm64.h66 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
Dmacro-assembler-arm64.cc68 unsigned reg_size = rd.SizeInBits(); in LogicalMacro() local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { in LogicalMacro()
186 unsigned reg_size = rd.SizeInBits(); in Mov() local
197 if (CountClearHalfWords(~imm, reg_size) > in Mov()
198 CountClearHalfWords(imm, reg_size)) { in Mov()
210 DCHECK((reg_size % 16) == 0); in Mov()
320 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) { in CountClearHalfWords() argument
321 DCHECK((reg_size % 8) == 0); in CountClearHalfWords()
323 for (unsigned i = 0; i < (reg_size / 16); i++) { in CountClearHalfWords()
335 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) { in IsImmMovz() argument
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Dsimulator-arm64.cc2131 T reg_size = sizeof(T) * 8; in BitfieldHelper() local
2137 mask = diff < reg_size - 1 ? (static_cast<T>(1) << (diff + 1)) - 1 in BitfieldHelper()
2141 mask = (static_cast<uint64_t>(mask) >> R) | (mask << (reg_size - R)); in BitfieldHelper()
2142 diff += reg_size; in BitfieldHelper()
2170 T result = (static_cast<unsignedT>(src) >> R) | (src << (reg_size - R)); in BitfieldHelper()
2172 T topbits_preshift = (static_cast<T>(1) << (reg_size - diff - 1)) - 1; in BitfieldHelper()
2389 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPCompare() local
2391 double fn_val = fpreg(reg_size, instr->Rn()); in VisitFPCompare()
2395 case FCMP_d: FPCompare(fn_val, fpreg(reg_size, instr->Rm())); break; in VisitFPCompare()
2412 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPConditionalCompare() local
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Dmacro-assembler-arm64.h226 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
227 static bool IsImmMovz(uint64_t imm, unsigned reg_size);
228 static unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
585 inline void PushSizeRegList(RegList registers, unsigned reg_size,
587 PushCPURegList(CPURegList(type, reg_size, registers));
589 inline void PopSizeRegList(RegList registers, unsigned reg_size,
591 PopCPURegList(CPURegList(type, reg_size, registers));
Dassembler-arm64.cc2265 unsigned reg_size = rd.SizeInBits(); in Logical() local
2278 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { in Logical()
2300 unsigned reg_size = rd.SizeInBits(); in LogicalImmediate() local
2302 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()
2303 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg | in LogicalImmediate()
2390 unsigned reg_size = rd.SizeInBits(); in EmitExtendShift() local
2396 unsigned non_shift_bits = (reg_size - left_shift) & (reg_size - 1); in EmitExtendShift()
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc276 int64_t Simulator::AddWithCarry(unsigned reg_size, in AddWithCarry() argument
282 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in AddWithCarry()
290 if (reg_size == kWRegSize) { in AddWithCarry()
318 N = CalcNFlag(result, reg_size); in AddWithCarry()
332 int64_t Simulator::ShiftOperand(unsigned reg_size, in ShiftOperand() argument
339 int64_t mask = reg_size == kXRegSize ? kXRegMask : kWRegMask; in ShiftOperand()
347 unsigned s_shift = kXRegSize - reg_size; in ShiftOperand()
353 if (reg_size == kWRegSize) { in ShiftOperand()
358 (reg_size - amount)); in ShiftOperand()
367 int64_t Simulator::ExtendValue(unsigned reg_size, in ExtendValue() argument
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Dinstructions-a64.cc60 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, in RepeatBitsAcrossReg() argument
65 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in RepeatBitsAcrossReg()
67 for (unsigned i = width; i < reg_size; i *= 2) { in RepeatBitsAcrossReg()
133 unsigned reg_size = SixtyFourBits() ? kXRegSize : kWRegSize; in ImmLogical() local
172 return RepeatBitsAcrossReg(reg_size, in ImmLogical()
Dmacro-assembler-a64.cc373 unsigned reg_size = rd.size(); in MoveImmediateHelper() local
384 if (CountClearHalfWords(~imm, reg_size) > in MoveImmediateHelper()
385 CountClearHalfWords(imm, reg_size)) { in MoveImmediateHelper()
401 VIXL_ASSERT((reg_size % 16) == 0); in MoveImmediateHelper()
441 int reg_size = dst.size(); in OneInstrMoveImmediateHelper() local
443 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) { in OneInstrMoveImmediateHelper()
450 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) { in OneInstrMoveImmediateHelper()
457 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) { in OneInstrMoveImmediateHelper()
700 unsigned reg_size = rd.size(); in LogicalMacro() local
758 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { in LogicalMacro()
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Dassembler-a64.h1424 unsigned reg_size = rd.size(); in lsl() local
1425 VIXL_ASSERT(shift < reg_size); in lsl()
1426 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl()
3806 static Instr ImmS(unsigned imms, unsigned reg_size) { in ImmS() argument
3807 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(imms)) || in ImmS()
3808 ((reg_size == kWRegSize) && is_uint5(imms))); in ImmS()
3809 USE(reg_size); in ImmS()
3813 static Instr ImmR(unsigned immr, unsigned reg_size) { in ImmR() argument
3814 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(immr)) || in ImmR()
3815 ((reg_size == kWRegSize) && is_uint5(immr))); in ImmR()
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Ddisasm-a64.cc245 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize in VisitLogicalImmediate() local
247 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) { in VisitLogicalImmediate()
270 bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) { in IsMovzMovnImm() argument
271 VIXL_ASSERT((reg_size == kXRegSize) || in IsMovzMovnImm()
272 ((reg_size == kWRegSize) && (value <= 0xffffffff))); in IsMovzMovnImm()
283 if ((reg_size == kXRegSize) && in IsMovzMovnImm()
290 if ((reg_size == kWRegSize) && in IsMovzMovnImm()
2892 unsigned reg_size = kXRegSize; in SubstituteRegisterField() local
2902 reg_type = CPURegister::kRegister; reg_size = kWRegSize; break; in SubstituteRegisterField()
2904 reg_type = CPURegister::kRegister; reg_size = kXRegSize; break; in SubstituteRegisterField()
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Ddisasm-a64.h144 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
/external/vixl/src/vixl/
Dutils.cc130 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size) { in CountClearHalfWords() argument
131 VIXL_ASSERT((reg_size % 8) == 0); in CountClearHalfWords()
133 for (unsigned i = 0; i < (reg_size / 16); i++) { in CountClearHalfWords()
Dutils.h199 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
/external/jemalloc/src/
Dstats.c81 size_t reg_size, run_size, curregs, availregs, milli; in stats_arena_bins_print() local
93 CTL_M2_GET("arenas.bin.0.size", j, &reg_size, size_t); in stats_arena_bins_print()
138 reg_size, j, curregs * reg_size, nmalloc, in stats_arena_bins_print()
147 reg_size, j, curregs * reg_size, nmalloc, in stats_arena_bins_print()
/external/v8/test/cctest/
Dtest-utils-arm64.cc214 int reg_size, int reg_count, RegList allowed) { in PopulateRegisterArray() argument
221 r[i] = Register::Create(n, reg_size); in PopulateRegisterArray()
241 int reg_size, int reg_count, RegList allowed) { in PopulateFPRegisterArray() argument
248 v[i] = FPRegister::Create(n, reg_size); in PopulateFPRegisterArray()
Dtest-utils-arm64.h207 int reg_size, int reg_count, RegList allowed);
211 int reg_size, int reg_count, RegList allowed);
/external/jemalloc/test/unit/
Djunk.c31 for (i = 0; i < bin_info->reg_size; i++) { in arena_dalloc_junk_small_intercept()
34 i, bin_info->reg_size); in arena_dalloc_junk_small_intercept()
/external/vixl/test/
Dtest-utils-a64.h229 int reg_size, int reg_count, RegList allowed);
233 int reg_size, int reg_count, RegList allowed);
Dtest-utils-a64.cc246 int reg_size, int reg_count, RegList allowed) { in PopulateRegisterArray() argument
253 r[i] = Register(n, reg_size); in PopulateRegisterArray()
273 int reg_size, int reg_count, RegList allowed) { in PopulateFPRegisterArray() argument
280 v[i] = FPRegister(n, reg_size); in PopulateFPRegisterArray()
Dtest-simulator-a64.cc297 uintptr_t results, unsigned reg_size) { in Test2Op_Helper() argument
298 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in Test2Op_Helper()
312 bool double_op = reg_size == kDRegSize; in Test2Op_Helper()
417 uintptr_t results, unsigned reg_size) { in Test3Op_Helper() argument
418 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in Test3Op_Helper()
433 bool double_op = reg_size == kDRegSize; in Test3Op_Helper()
552 uintptr_t results, unsigned reg_size) { in TestCmp_Helper() argument
553 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in TestCmp_Helper()
568 bool double_op = reg_size == kDRegSize; in TestCmp_Helper()
681 uintptr_t results, unsigned reg_size) { in TestCmpZero_Helper() argument
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vs_emit.c1168 GLuint reg_size ) in deref() argument
1174 GLuint byte_offset = arg.nr * 32 + arg.subnr + offset * reg_size; in deref()
1187 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size)); in deref()
1190 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size)); in deref()
1208 int reg_size = 32; in move_to_reladdr_dst() local
1225 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size)); in move_to_reladdr_dst()
1229 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size)); in move_to_reladdr_dst()
1231 brw_imm_uw(byte_offset + reg_size / 2)); in move_to_reladdr_dst()

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