/external/llvm/test/TableGen/ |
D | SetTheory.td | 96 // The 'rotl' operator rotates left, but also accepts a negative shift. 97 def rotl; 98 def S6a : Set<(rotl S0f, 0)>; 99 def S6b : Set<(rotl S0f, 1)>; 100 def S6c : Set<(rotl S0f, 3)>; 101 def S6d : Set<(rotl S0f, 4)>; 102 def S6e : Set<(rotl S0f, 5)>; 103 def S6f : Set<(rotl S0f, -1)>; 104 def S6g : Set<(rotl S0f, -4)>; 105 def S6h : Set<(rotl S0f, -5)>; [all …]
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/external/llvm/test/CodeGen/SystemZ/ |
D | risbg-01.ll | 143 %rotl = or i32 %parta, %partb 144 %and = and i32 %rotl, 248 155 %rotl = or i64 %parta, %partb 156 %and = and i64 %rotl, 248 167 %rotl = or i32 %parta, %partb 168 %and = and i32 %rotl, 114688 179 %rotl = or i64 %parta, %partb 180 %and = and i64 %rotl, 114688 193 %rotl = or i32 %parta, %partb 194 %and = and i32 %rotl, 126 [all …]
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/external/jmonkeyengine/engine/src/android/jme3tools/android/ |
D | Fixed.java | 100 int rotl = 0; 103 while (rotl < 32) { 105 rotl++; 110 ATAN_SHIFT = rotl; 114 lut[n] = tan(n) >> rotl;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 127 let AltOrders = [(rotl GPR32common, 8)]; 132 let AltOrders = [(rotl GPR64common, 8)]; 137 let AltOrders = [(rotl GPR32, 8)]; 141 let AltOrders = [(rotl GPR64, 8)]; 147 let AltOrders = [(rotl GPR32sp, 8)]; 151 let AltOrders = [(rotl GPR64sp, 8)]; 410 def DSeqPairs : RegisterTuples<[dsub0, dsub1], [(rotl FPR64, 0), (rotl FPR64, 1)]>; 412 [(rotl FPR64, 0), (rotl FPR64, 1), 413 (rotl FPR64, 2)]>; 415 [(rotl FPR64, 0), (rotl FPR64, 1), [all …]
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/external/boringssl/src/crypto/sha/asm/ |
D | sha1-586.pl | 165 &rotl($tmp1,5); # tmp1=ROTATE(a,5) 195 &rotl($f,1); # f=ROTATE(f,1) 201 &rotl($a,5); # ROTATE(a,5) 212 &rotl($f,1); # f=ROTATE(f,1) 218 &rotl($tmp1,5); # ROTATE(a,5) 239 &rotl($f,1); # f=ROTATE(f,1) 243 &rotl($a,5); # ROTATE(a,5) 257 &rotl($f,1); # f=ROTATE(f,1) 261 &rotl($tmp1,5); # ROTATE(a,5) 282 &rotl($f,1); # f=ROTATE(f,1) [all …]
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/external/boringssl/src/crypto/md5/asm/ |
D | md5-586.pl | 64 &rotl($a,$s); 89 &rotl($a,$s); 112 &rotl($a,$s); 135 &rotl($a,$s); 161 &rotl($a,$s);
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/external/llvm/lib/Target/X86/ |
D | X86InstrShiftRotate.td | 473 [(set GR8:$dst, (rotl GR8:$src1, CL))], IIC_SR>; 476 [(set GR16:$dst, (rotl GR16:$src1, CL))], IIC_SR>, OpSize16; 479 [(set GR32:$dst, (rotl GR32:$src1, CL))], IIC_SR>, OpSize32; 482 [(set GR64:$dst, (rotl GR64:$src1, CL))], IIC_SR>; 487 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))], IIC_SR>; 490 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))], 494 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))], 499 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))], 505 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))], 509 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))], [all …]
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D | X86InstrCompiler.td | 1528 defm : MaskedShiftAmountPats<rotl, "ROL">;
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/external/llvm/unittests/ADT/ |
D | APIntTest.cpp | 156 EXPECT_EQ(one, one.rotl(0)); in TEST() 157 EXPECT_EQ(one, one.rotl(1)); in TEST() 696 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(0)); in TEST() 697 EXPECT_EQ(APInt(8, 2), APInt(8, 1).rotl(1)); in TEST() 698 EXPECT_EQ(APInt(8, 4), APInt(8, 1).rotl(2)); in TEST() 699 EXPECT_EQ(APInt(8, 16), APInt(8, 1).rotl(4)); in TEST() 700 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(8)); in TEST() 702 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotl(0)); in TEST() 703 EXPECT_EQ(APInt(8, 32), APInt(8, 16).rotl(1)); in TEST() 704 EXPECT_EQ(APInt(8, 64), APInt(8, 16).rotl(2)); in TEST() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 287 let AltOrders = [(rotl DPR, 16)]; 305 let AltOrders = [(rotl QPR, 8)]; 331 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))]; 366 let AltOrders = [(rotl QQPR, 8)]; 389 let AltOrders = [(rotl QQQQPR, 8)];
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUInstrInfo.td | 29 // rotl(a, b) = bitalign(a, a, 32 - b)
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/external/boringssl/src/crypto/perlasm/ |
D | x86asm.pl | 64 sub ::rotl { &rol(@_); }
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/external/boringssl/src/crypto/aes/asm/ |
D | aes-586.pl | 495 &rotl ($s[$i],24); 1308 &rotl ($s[$i],8); # = ROTATE(tp1,8) 1315 &rotl ($tp2,24); 1317 &rotl ($tp4,16); 1319 &rotl ($tp8,8); 2905 &rotl ($tp1,8); # = ROTATE(tp1,8) 2913 &rotl ($tp2,24); 2916 &rotl ($tp4,16); 2918 &rotl ($tp8,8);
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/external/llvm/include/llvm/ADT/ |
D | APInt.h | 880 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(unsigned rotateAmt) const; 901 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(const APInt &rotateAmt) const;
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/external/clang/include/clang/Basic/ |
D | arm_neon.td | 146 // rotl - Rotate set left by a number of elements. 147 // example: (rotl mask0, 3) -> [3, 4, 5, 6, 0, 1, 2] 148 def rotl; 149 // rotl - Rotate set right by a number of elements. 384 (decimate (rotl mask0, 1), 2), 385 (decimate (rotl mask1, 1), 2)))>; 387 def OP_UZP2 : Op<(shuffle $p0, $p1, (add (decimate (rotl mask0, 1), 2), 388 (decimate (rotl mask1, 1), 2)))>;
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/external/llvm/lib/Support/ |
D | APInt.cpp | 680 return *this == rotl(SplatSizeInBits); in isSplat() 1267 APInt APInt::rotl(const APInt &rotateAmt) const { in rotl() function in APInt 1268 return rotl((unsigned)rotateAmt.getLimitedValue(BitWidth)); in rotl() 1271 APInt APInt::rotl(unsigned rotateAmt) const { in rotl() function in APInt
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.td | 1095 // 32 bit r2 = rotl r1, n 1101 [(set Int32Regs:$dst, (rotl Int32Regs:$src, (i32 imm:$amt)))]>, 1107 [(set Int32Regs:$dst, (rotl Int32Regs:$src, Int32Regs:$amt))]>, 1144 def : Pat<(rotl Int32Regs:$src, (i32 imm:$amt)), 1162 [(set Int32Regs:$dst, (rotl Int32Regs:$src, Int32Regs:$amt))]>, 1195 def : Pat<(rotl Int64Regs:$src, (i32 imm:$amt)), 1211 [(set Int64Regs:$dst, (rotl Int64Regs:$src, Int32Regs:$amt))]>;
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/external/llvm/test/Transforms/GVN/ |
D | 2007-07-31-NoDomInherit.ll | 93 declare i32 @rotl(i32, i32, i32)
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/external/llvm/docs/ |
D | ExtendingLLVM.rst | 163 See the patterns for ``rotl`` in ``PPCInstrInfo.td``.
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 1191 def : Pat<(rotl i64:$in, i32:$sh), 1193 def : Pat<(rotl i64:$in, (i32 imm:$imm)),
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D | PPCInstrInfo.td | 2561 def : Pat<(rotl i32:$in, i32:$sh), 2563 def : Pat<(rotl i32:$in, (i32 imm:$imm)), 2567 def : Pat<(and (rotl i32:$in, i32:$sh), maskimm32:$imm),
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrInfo.td | 1050 def RLL : BinaryRSY<"rll", 0xEB1D, rotl, GR32>; 1051 def RLLG : BinaryRSY<"rllg", 0xEB1C, rotl, GR64>;
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 357 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
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D | Target.td | 240 // (rotl GPR, 1) - Rotate N places to the left.
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/external/clang/lib/AST/ |
D | ExprConstant.cpp | 1609 Res |= EltAsInt.zextOrTrunc(VecSize).rotl(i*EltSize); in EvalAndBitcastToAPInt() 5578 Elt = SValInt.rotl(i*EltSize+FloatEltSize).trunc(FloatEltSize); in VisitCastExpr() 5587 Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize); in VisitCastExpr()
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