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Searched refs:s_load_dword (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/test/CodeGen/R600/
Duse-sgpr-multiple-times.ll10 ; GCN: s_load_dword [[SGPR:s[0-9]+]],
20 ; GCN: s_load_dword [[SGPR:s[0-9]+]],
30 ; SI: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
31 ; SI: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
32 ; VI: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
33 ; VI: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
44 ; SI: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
45 ; SI: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
46 ; VI: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
47 ; VI: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
[all …]
Dwork-item-intrinsics.ll10 ; GCN: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0
24 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1
25 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
39 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2
40 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
54 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x3
55 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xc
69 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
70 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x10
84 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x5
[all …]
Datomic_cmp_swap_local.ll7 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
8 ; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
9 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
10 ; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
26 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
28 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
59 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
60 ; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xa
61 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
62 ; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x28
[all …]
Dllvm.AMDGPU.div_fixup.ll8 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
9 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
10 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
11 ; VI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
12 ; VI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x34
13 ; VI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
Doperand-spacing.ll7 ; SI-DAG: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
8 ; SI-DAG: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
9 ; VI-DAG: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
10 ; VI-DAG: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
Dgv-const-addrspace.ll11 ; FIXME: We should be using s_load_dword here.
13 ; VI: s_load_dword
34 ; FIXME: We should be using s_load_dword here.
36 ; VI: s_load_dword
59 ; GCN: s_load_dword
74 ; FIXME: We should be using s_load_dword here.
76 ; VI: s_load_dword
Dllvm.AMDGPU.div_fmas.ll12 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
13 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
14 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
15 ; VI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
16 ; VI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x34
17 ; VI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
31 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
32 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
45 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
46 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
[all …]
Dllvm.AMDGPU.clamp.ll10 ; SI: s_load_dword [[ARG:s[0-9]+]],
23 ; SI: s_load_dword [[ARG:s[0-9]+]],
35 ; SI: s_load_dword [[ARG:s[0-9]+]],
47 ; SI: s_load_dword [[ARG:s[0-9]+]],
60 ; SI: s_load_dword [[ARG:s[0-9]+]],
Dsmrd.ll6 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01
7 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4
18 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff
19 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
31 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
32 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
51 ; FIXME: We should be able to use s_load_dword here
Dfcopysign.f32.ll12 ; SI: s_load_dword [[SMAG:s[0-9]+]], {{.*}} 0xb
13 ; SI: s_load_dword [[SSIGN:s[0-9]+]], {{.*}} 0xc
14 ; VI: s_load_dword [[SMAG:s[0-9]+]], {{.*}} 0x2c
15 ; VI: s_load_dword [[SSIGN:s[0-9]+]], {{.*}} 0x30
Dno-shrink-extloads.ll10 ; SI: s_load_dword s
35 ; SI: s_load_dword s
57 ; SI: s_load_dword s
79 ; SI: s_load_dword s
101 ; SI: s_load_dword s
126 ; SI: s_load_dword s
148 ; SI: s_load_dword s
172 ; SI: s_load_dword s
Dimm.ll134 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
144 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
154 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
164 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
174 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
184 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
194 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
204 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
214 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
246 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
[all …]
Dllvm.AMDGPU.class.ll10 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
11 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
25 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
26 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
41 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
42 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
57 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
58 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
74 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
87 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
[all …]
Dkernel-args.ll19 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
20 ; VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
31 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
32 ; VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
54 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
55 ; VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
66 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
67 ; VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
78 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
79 ; VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
[all …]
Dfabs.ll75 ; SI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
76 ; VI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
87 ; SI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
88 ; VI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
Dschedule-kernel-arg-loads.ll7 ; SI-NEXT: s_load_dword s{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
8 ; SI-NEXT: s_load_dword s{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0xe
13 ; VI-NEXT: s_load_dword s{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0x34
15 ; VI-NEXT: s_load_dword s{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0x38
Dshl_add_constant.ll57 ; SI-DAG: s_load_dword [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
58 ; SI-DAG: s_load_dword [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
73 ; SI-DAG: s_load_dword [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
74 ; SI-DAG: s_load_dword [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
Dmul.ll44 ; SI: s_load_dword
45 ; SI: s_load_dword
56 ; SI: s_load_dword
57 ; SI: s_load_dword
111 ; SI: s_load_dword [[SRC0:s[0-9]+]],
112 ; SI: s_load_dword [[SRC1:s[0-9]+]],
Dtrunc-store-i1.ll6 ; SI: s_load_dword [[LOAD:s[0-9]+]],
25 ; SI: s_load_dword [[LOAD:s[0-9]+]],
Dsetcc-opt.ll127 ; SI-DAG: s_load_dword [[A:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
128 ; SI-DAG: s_load_dword [[B:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
129 ; VI-DAG: s_load_dword [[A:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
130 ; VI-DAG: s_load_dword [[B:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
173 ; GCN: s_load_dword [[B:s[0-9]+]]
Dfneg.ll61 ; SI: s_load_dword [[NEG_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
62 ; VI: s_load_dword [[NEG_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
Dllvm.AMDGPU.div_scale.ll90 ; SI-DAG: s_load_dword [[A:s[0-9]+]]
108 ; SI-DAG: s_load_dword [[A:s[0-9]+]]
126 ; SI-DAG: s_load_dword [[B:s[0-9]+]]
144 ; SI-DAG: s_load_dword [[B:s[0-9]+]]
233 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
234 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
247 ; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
248 ; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc
Dctpop.ll12 ; GCN: s_load_dword [[SVAL:s[0-9]+]],
222 ; GCN-DAG: s_load_dword [[VAR:s[0-9]+]],
238 ; GCN-DAG: s_load_dword [[VAR:s[0-9]+]],
275 ; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xd
276 ; VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x34
Dadd_i64.ll73 ; SI: s_load_dword s[[SREG0:[0-9]+]]
74 ; SI: s_load_dword s[[SREG1:[0-9]+]]
/external/llvm/test/MC/R600/
Dsmrd.s4 s_load_dword s1, s[2:3], 1 label
7 s_load_dword s1, s[2:3], s4 label

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