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Searched refs:s_mov_b32 (Results 1 – 25 of 27) sorted by relevance

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/external/llvm/test/MC/R600/
Dsop1-err.s4 s_mov_b32 v1, s2 label
7 s_mov_b32 s1, v0 label
10 s_mov_b32 s[1:2], s0 label
13 s_mov_b32 s0, s[1:2] label
16 s_mov_b32 s220, s0 label
19 s_mov_b32 s0, s220 label
29 s_mov_b32 s1, 0xfffffffff label
37 s_mov_b32 s label
Dsop1.s4 s_mov_b32 s1, s2 label
7 s_mov_b32 s1, 1 label
10 s_mov_b32 s1, 100 label
32 s_mov_b32 s1, s2 label
/external/llvm/test/CodeGen/R600/
Dconcat_vectors.ll9 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
18 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
27 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
36 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
45 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
54 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
63 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
72 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
81 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
90 ; SI-NOT: s_mov_b32 s{{[0-9]}}, 0x80f000
[all …]
Ds_movk_i32.ll5 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}}
6 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
20 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
34 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 64{{$}}
47 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x8000{{$}}
48 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
61 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x20000{{$}}
62 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
76 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0xff00ffff{{$}}
90 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 63{{$}}
[all …]
Dllvm.AMDGPU.rsq.clamped.f64.ll11 ; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1
12 ; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff
13 ; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]]
15 ; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff
16 ; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]]
Dindirect-addressing-si.ll8 ; CHECK: s_mov_b32 m0
19 ; CHECK: s_mov_b32 m0
29 ; CHECK: s_mov_b32 m0
41 ; CHECK: s_mov_b32 m0
Dfconst64.ll5 ; CHECK-DAG: s_mov_b32 {{s[0-9]+}}, 0x40140000
6 ; CHECK-DAG: s_mov_b32 {{s[0-9]+}}, 0
Dand.ll256 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 4.0
257 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0{{$}}
267 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], -4.0
268 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], -1{{$}}
269 ; SI-DAG: s_mov_b32 s[[K_HI_COPY:[0-9]+]], s[[K_HI]]
279 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 4.0
280 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0{{$}}
289 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], -4.0
290 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0{{$}}
Dfp_to_sint.f64.ll37 ; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
38 ; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
43 ; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
Dfp_to_uint.f64.ll37 ; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
38 ; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
43 ; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
Dload.ll469 ; SI: s_mov_b32 m0
482 ; SI: s_mov_b32 m0
496 ; SI: s_mov_b32 m0
513 ; SI: s_mov_b32 m0
530 ; SI: s_mov_b32 m0
553 ; SI: s_mov_b32 m0
570 ; SI: s_mov_b32 m0
584 ; SI: s_mov_b32 m0
598 ; SI: s_mov_b32 m0
615 ; SI: s_mov_b32 m0
[all …]
Dzero_extend.ll10 ; SI: s_mov_b32 [[ZERO:s[0-9]]], 0{{$}}
33 ; SI: s_mov_b32 s{{[0-9]+}}, 0
Dselect64.ll54 ; CHECK: s_mov_b32 [[SHI:s[0-9]+]], 63
55 ; CHECK: s_mov_b32 [[SLO:s[0-9]+]], 0
Dhsa.ll7 ; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000
Dsmrd.ll46 ; SI: s_mov_b32 s[[SLO:[0-9]+]], 0 ;
47 ; SI: s_mov_b32 s[[SHI:[0-9]+]], 4
48 ; SI: s_mov_b32 s[[SSLO:[0-9]+]], s[[SLO]]
Dimm.ll6 ; CHECK: s_mov_b32 [[LO:s[0-9]+]], 5
17 ; CHECK: s_mov_b32 [[HI:s[0-9]+]], 5
27 ; CHECK-DAG: s_mov_b32 s[[HI_SREG:[0-9]+]], 0x80000000
28 ; CHECK-DAG: s_mov_b32 s[[LO_SREG:[0-9]+]], 0{{$}}
526 ; CHECK-DAG: s_mov_b32 s[[HI_SREG:[0-9]+]], 0x80000000
527 ; CHECK-DAG: s_mov_b32 s[[LO_SREG:[0-9]+]], 0{{$}}
609 ; CHECK-DAG: s_mov_b32 s[[HI_SREG:[0-9]+]], 0x40b00000
610 ; CHECK-DAG: s_mov_b32 s[[LO_SREG:[0-9]+]], 0{{$}}
Dllvm.SI.sendmsg-m0.ll5 ; BOTH: s_mov_b32 m0, s0
Dllvm.SI.fs.interp.ll5 ;CHECK: s_mov_b32
Dfcopysign.f64.ll15 ; GCN-DAG: s_mov_b32 [[SCONST:s[0-9]+]], 0x7fffffff
Dfcopysign.f32.ll18 ; GCN-DAG: s_mov_b32 [[SCONST:s[0-9]+]], 0x7fffffff
Dllvm.round.f64.ll23 ; SI-DAG: s_mov_b32 [[BFIMASK:s[0-9]+]], 0x7fffffff
Dllvm.round.ll7 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x7fffffff
Dmubuf.ll153 ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000
162 ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000
Dbswap.ll16 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xff00ff
Dor.ll116 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xdf77987f

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