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Searched refs:seleqz (Results 1 – 20 of 20) sorted by relevance

/external/llvm/test/CodeGen/Mips/
Dcmov.ll22 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $4
37 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $[[CC]]
62 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $4
77 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $[[CC]]
100 ; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
108 ; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
132 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
142 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
167 ; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $6, $[[R0]]
168 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $7, $[[R0]]
[all …]
Dzeroreg.ll19 ; 32R6: seleqz $2, $[[R0]], $4
25 ; 64R6: seleqz $2, $[[R0]], $4
69 ; 32R6-DAG: seleqz $2, $[[R0]], $[[CC]]
70 ; 32R6-DAG: seleqz $3, $[[R1]], $[[CC]]
76 ; 64R6: seleqz $2, $[[R0]], $4
Dselect.ll21 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
31 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
59 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $4
63 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $4
77 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
108 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $[[T2]]
112 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $[[T2]]
122 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
520 ; 32R6: seleqz $[[EQ:[0-9]+]], $5, $[[CCGPR]]
535 ; 64R6: seleqz $[[EQ:[0-9]+]], $5, $[[CCGPR]]
[all …]
Dcountleading.ll55 ; MIPS32-R6-DAG: seleqz $[[R5:[0-9]+]], $[[R2]], $5
81 ; MIPS32-R6-DAG: seleqz $[[R6:[0-9]+]], $[[R2]], $[[R4]]
Dmips64-f128.ll631 ; CMP_CC_FMT-DAG: seleqz $[[EQ1:[0-9]+]], $8, $[[CC]]
634 ; CMP_CC_FMT-DAG: seleqz $[[EQ2:[0-9]+]], $9, $[[CC]]
660 ; CMP_CC_FMT: seleqz $[[EQ1:[0-9]+]], $[[R1]], $[[CC]]
663 ; CMP_CC_FMT: seleqz $[[EQ2:[0-9]+]], $[[R0]], $[[CC]]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dlshr.ll121 ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T3]]
126 ; 32R6: seleqz $2, $[[T7]], $[[T5]]
179 ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]]
184 ; 64R6: seleqz $2, $[[T0]], $[[T7]]
Dashr.ll120 ; 32R6: seleqz $[[T2:[0-9]+]], $[[T0]], $[[T1]]
129 ; 32R6: seleqz $[[T11:[0-9]+]], $[[T10]], $[[T1]]
184 ; 64R6: seleqz $[[T4:[0-9]+]], $[[T1]], $[[T3]]
193 ; 64R6: seleqz $[[T12:[0-9]+]], $[[T11]], $[[T3]]
Dshl.ll133 ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T2]]
138 ; 32R6: seleqz $3, $[[T7]], $[[T5]]
191 ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]]
196 ; 64R6: seleqz $3, $[[T0]], $[[T7]]
Dselect.ll50 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
75 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
100 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
135 ; SEL-32: seleqz $[[T3:[0-9]+]], $[[T2]], $[[T0]]
139 ; SEL-32: seleqz $[[T6:[0-9]+]], $[[T5]], $[[T0]]
157 ; SEL-64: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
/external/llvm/test/MC/Disassembler/Mips/
Dmips32r6.txt103 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
113 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
114 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
Dmips64r6.txt116 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
126 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
127 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6.txt98 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
109 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
110 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
Dvalid-mips32r6-el.txt98 0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
109 0x14 0x10 0x04 0x46 # CHECK: seleqz.s $f0, $f2, $f4
110 0x14 0x10 0x24 0x46 # CHECK: seleqz.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt112 0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
123 0x14 0x10 0x04 0x46 # CHECK: seleqz.s $f0, $f2, $f4
124 0x14 0x10 0x24 0x46 # CHECK: seleqz.d $f0, $f2, $f4
Dvalid-mips64r6.txt112 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
123 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
124 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td489 class SELEQZ_DESC : SELEQNE_Z_DESC_BASE<"seleqz", GPR32Opnd>;
529 class SELEQZ_S_DESC : SELEQNEZ_DESC_BASE<"seleqz.s", FGR32Opnd>;
530 class SELEQZ_D_DESC : SELEQNEZ_DESC_BASE<"seleqz.d", FGR64Opnd>;
DMips64r6InstrInfo.td75 class SELEQZ64_DESC : SELEQNE_Z_DESC_BASE<"seleqz", GPR64Opnd>;
/external/v8/src/mips/
Dassembler-mips.h844 void seleqz(Register rs, Register rt, Register rd);
845 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister ft,
/external/v8/src/mips64/
Dassembler-mips64.h874 void seleqz(Register rs, Register rt, Register rd);
875 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister ft,
Dassembler-mips64.cc2129 void Assembler::seleqz(Register rs, Register rt, Register rd) { in seleqz() function in v8::internal::Assembler
2136 void Assembler::seleqz(SecondaryField fmt, FPURegister fd, in seleqz() function in v8::internal::Assembler