Searched refs:smaxv (Results 1 – 13 of 13) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-smaxv.ll | 5 ; CHECK: smaxv.8b b[[REGNUM:[0-9]+]], v0 9 %vmaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a1) 16 ; CHECK: smaxv.4h h[[REGNUM:[0-9]+]], v0 20 %vmaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a1) 32 %vmaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v2i32(<2 x i32> %a1) 38 ; CHECK: smaxv.16b b[[REGNUM:[0-9]+]], v0 42 %vmaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a1) 49 ; CHECK: smaxv.8h h[[REGNUM:[0-9]+]], v0 53 %vmaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a1) 60 ; CHECK: smaxv.4s [[REGNUM:s[0-9]+]], v0 [all …]
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D | arm64-neon-across.ll | 47 declare i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32>) 49 declare i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16>) 51 declare i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8>) 57 declare i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16>) 59 declare i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8>) 167 ; CHECK: smaxv b{{[0-9]+}}, {{v[0-9]+}}.8b 169 %smaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) 170 %0 = trunc i32 %smaxv.i to i8 176 ; CHECK: smaxv h{{[0-9]+}}, {{v[0-9]+}}.4h 178 %smaxv.i = tail call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-across.s | 33 smaxv b0, v1.8b 34 smaxv b0, v1.16b 35 smaxv h0, v1.4h 36 smaxv h0, v1.8h 37 smaxv s0, v1.4s
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D | neon-diagnostics.s | 3773 smaxv s0, v1.2s 3795 smaxv d0, v1.2d define
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.h | 1881 LogicVRegister smaxv(VectorFormat vform,
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D | macro-assembler-a64.h | 2270 V(smaxv, Smaxv) \
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D | assembler-a64.h | 2954 void smaxv(const VRegister& vd,
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D | simulator-a64.cc | 2836 case NEON_SMAXV: smaxv(vf, rd, rn); break; in VisitNEONAcrossLanes()
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D | logic-a64.cc | 1470 LogicVRegister Simulator::smaxv(VectorFormat vform, in smaxv() function in vixl::Simulator
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D | assembler-a64.cc | 4033 V(smaxv, NEON_SMAXV, true) \
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/external/vixl/test/ |
D | test-simulator-a64.cc | 4030 DEFINE_TEST_NEON_ACROSS(smaxv, Basic)
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/external/vixl/doc/ |
D | supported-instructions.md | 3122 void smaxv(const VRegister& vd,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 3827 defm SMAXV : SIMDAcrossLanesBHS<0, 0b01010, "smaxv">;
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