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Searched refs:swc1 (Results 1 – 25 of 73) sorted by relevance

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/external/valgrind/none/tests/mips64/
Dfpu_load_store.stdout.exp-LE2439 swc1 :: offset: 0x0, out: 0x0
2440 swc1 :: offset: 0x4, out: 0x0
2441 swc1 :: offset: 0x8, out: 0x9823b6e
2442 swc1 :: offset: 0xc, out: 0xd4326d9
2443 swc1 :: offset: 0x10, out: 0x130476dc
2444 swc1 :: offset: 0x14, out: 0x17c56b6b
2445 swc1 :: offset: 0x18, out: 0x1a864db2
2446 swc1 :: offset: 0x1c, out: 0x1e475005
2447 swc1 :: offset: 0x20, out: 0x2608edb8
2448 swc1 :: offset: 0x24, out: 0x22c9f00f
[all …]
Dfpu_load_store.stdout.exp-BE2439 swc1 :: offset: 0x0, out: 0x0
2440 swc1 :: offset: 0x4, out: 0x9823b6e00000000
2441 swc1 :: offset: 0x8, out: 0xd4326d900000000
2442 swc1 :: offset: 0xc, out: 0x130476dc00000000
2443 swc1 :: offset: 0x10, out: 0x17c56b6b00000000
2444 swc1 :: offset: 0x14, out: 0x1a864db200000000
2445 swc1 :: offset: 0x18, out: 0x1e47500500000000
2446 swc1 :: offset: 0x1c, out: 0x2608edb800000000
2447 swc1 :: offset: 0x20, out: 0x22c9f00f00000000
2448 swc1 :: offset: 0x24, out: 0x2f8ad6d600000000
[all …]
/external/valgrind/none/tests/mips32/
Dvfp.stdout.exp-mips32-BE73 swc1 $f0, 0($t0) :: out: 0x0
74 swc1 $f0, 0($t0) :: out: 0x40400000
75 swc1 $f0, 0($t0) :: out: 0x44ad1333
76 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
77 swc1 $f0, 0($t0) :: out: 0x44db0000
78 swc1 $f0, 0($t0) :: out: 0x322bcc77
79 swc1 $f0, 0($t0) :: out: 0xc732da7a
80 swc1 $f0, 0($t0) :: out: 0x42080079
81 swc1 $f0, 0($t0) :: out: 0x49d5e008
Dvfp.stdout.exp-mips32-LE73 swc1 $f0, 0($t0) :: out: 0x0
74 swc1 $f0, 0($t0) :: out: 0x40400000
75 swc1 $f0, 0($t0) :: out: 0x44ad1333
76 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
77 swc1 $f0, 0($t0) :: out: 0x44db0000
78 swc1 $f0, 0($t0) :: out: 0x322bcc77
79 swc1 $f0, 0($t0) :: out: 0xc732da7a
80 swc1 $f0, 0($t0) :: out: 0x42080079
81 swc1 $f0, 0($t0) :: out: 0x49d5e008
Dvfp.stdout.exp-mips32r2-BE154 swc1 $f0, 0($t0) :: out: 0x0
155 swc1 $f0, 0($t0) :: out: 0x40400000
156 swc1 $f0, 0($t0) :: out: 0x44ad1333
157 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
158 swc1 $f0, 0($t0) :: out: 0x44db0000
159 swc1 $f0, 0($t0) :: out: 0x322bcc77
160 swc1 $f0, 0($t0) :: out: 0xc732da7a
161 swc1 $f0, 0($t0) :: out: 0x42080079
162 swc1 $f0, 0($t0) :: out: 0x49d5e008
Dvfp.stdout.exp-mips32r2-LE154 swc1 $f0, 0($t0) :: out: 0x0
155 swc1 $f0, 0($t0) :: out: 0x40400000
156 swc1 $f0, 0($t0) :: out: 0x44ad1333
157 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
158 swc1 $f0, 0($t0) :: out: 0x44db0000
159 swc1 $f0, 0($t0) :: out: 0x322bcc77
160 swc1 $f0, 0($t0) :: out: 0xc732da7a
161 swc1 $f0, 0($t0) :: out: 0x42080079
162 swc1 $f0, 0($t0) :: out: 0x49d5e008
/external/llvm/test/CodeGen/Mips/
Dfastcc.ll227 ; CHECK: swc1 $f0
228 ; CHECK: swc1 $f1
229 ; CHECK: swc1 $f2
230 ; CHECK: swc1 $f3
231 ; CHECK: swc1 $f4
232 ; CHECK: swc1 $f5
233 ; CHECK: swc1 $f6
234 ; CHECK: swc1 $f7
235 ; CHECK: swc1 $f8
236 ; CHECK: swc1 $f9
[all …]
Dsint-fp-store_pattern.ll10 ; 32: swc1 $f[[R0]],
21 ; 32: swc1 $f[[R0]],
24 ; 64: swc1 $f[[R0]],
Dmips64fpldst.ll39 ; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]])
42 ; CHECK-N32: swc1 $f{{[0-9]+}}, 0($[[R0]])
Dno-odd-spreg.ll31 ; ODDSPREG-NOT: swc1
36 ; NOODDSPREG: swc1 $[[T0]],
Dfp-indexed-ls.ll114 ; MIPS32R1-DAG: swc1 $[[T0]], 0($[[T1]])
121 ; MIPS32R6-DAG: swc1 $[[T0]], 0($[[T1]])
128 ; MIPS64R6-DAG: swc1 $[[T0]], 0($[[T1]])
/external/llvm/test/CodeGen/Mips/cconv/
Darguments-hard-float.ll120 ; ALL-DAG: swc1 $f12, 4([[R1]])
121 ; O32-DAG: swc1 $f14, 8([[R1]])
122 ; NEW-DAG: swc1 $f13, 8([[R1]])
129 ; NEW-DAG: swc1 $f14, 12([[R1]])
131 ; NEW-DAG: swc1 $f15, 16([[R1]])
135 ; O32-DAG: swc1 [[F1]], 20([[R1]])
136 ; NEW-DAG: swc1 $f16, 20([[R1]])
138 ; O32-DAG: swc1 [[F1]], 24([[R1]])
139 ; NEW-DAG: swc1 $f17, 24([[R1]])
141 ; O32-DAG: swc1 [[F1]], 28([[R1]])
[all …]
Darguments-hard-float-varargs.ll115 ; NEW-DAG: swc1 $f12, 4([[R2]])
157 ; ALL-DAG: swc1 [[FTMP1]], 8([[R2]])
/external/llvm/test/MC/Mips/
Dmips-memory-instructions.s12 # CHECK: swc1 $f2, 16($5) # encoding: [0x10,0x00,0xa2,0xe4]
19 swc1 $f2, 16($5)
Dmicromips-fpu-instructions.s22 # CHECK-EL: swc1 $f2, 4($6) # encoding: [0x46,0x98,0x04,0x00]
87 # CHECK-EB: swc1 $f2, 4($6) # encoding: [0x98,0x46,0x00,0x04]
150 swc1 $f2, 4($6)
Dnacl-mask.s117 swc1 $f0, 0($4)
144 # CHECK-NEXT: swc1 $f0, 0($4)
Dmips-fpu-instructions.s154 # CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
189 swc1 $f9,9158($a3)
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Doverflt.ll25 ; CHECK: swc1 $f[[REG_FPCONST]], 0($[[REG_Y_IDX]])
45 ; CHECK-DAG: swc1 $f[[Y_IDX]], 0($[[REG_RESULT]])
Dsimplestorefp1.ll23 ; CHECK: swc1 $f[[REG3]], 0($[[REG4]])
Dloadstore2.ll65 ; CHECK: swc1 $f[[REGf]], 0(${{[0-9]+}})
/external/v8/test/cctest/
Dtest-assembler-mips.cc1099 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out))); in TEST() local
1106 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out))); in TEST() local
1178 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \ in TEST()
1182 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \ in TEST()
1186 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \ in TEST()
1190 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \ in TEST()
1215 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_invalid_result))); in TEST()
Dtest-assembler-mips64.cc1110 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out))); in TEST() local
1117 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out))); in TEST() local
1189 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \ in TEST()
1193 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \ in TEST()
1197 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \ in TEST()
1201 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \ in TEST()
1226 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_invalid_result))); in TEST()
/external/llvm/test/MC/Mips/mips1/
Dvalid.s114 swc1 $f6,-8465($24)
/external/v8/src/mips/
Dlithium-gap-resolver-mips.cc216 __ swc1(kLithiumScratchDouble, destination_operand); in EmitMove() local
/external/llvm/test/MC/Mips/mips2/
Dvalid.s142 swc1 $f6,-8465($24)

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