1# RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \ 2# RUN: | llvm-objdump -triple mipsel -disassemble -no-show-raw-insn - \ 3# RUN: | FileCheck %s 4 5# This test tests that address-masking sandboxing is added when given assembly 6# input. 7 8 9# Test that address-masking sandboxing is added before indirect branches and 10# returns. 11 12 .align 4 13test1: 14 .set noreorder 15 16 jr $a0 17 nop 18 jr $ra 19 nop 20 21# CHECK-LABEL: test1: 22 23# CHECK: and $4, $4, $14 24# CHECK-NEXT: jr $4 25 26# Check that additional nop is inserted, to align mask and jr to the next 27# bundle. 28 29# CHECK-NEXT: nop 30# CHECK-NEXT: nop 31 32# CHECK: and $ra, $ra, $14 33# CHECK-NEXT: jr $ra 34 35 36 37# Test that address-masking sandboxing is added before load instructions. 38 39 .align 4 40test2: 41 .set noreorder 42 43 lb $4, 0($1) 44 nop 45 lbu $4, 0($2) 46 lh $4, 0($3) 47 lhu $1, 0($4) 48 lw $4, 0($5) 49 lwc1 $f0, 0($6) 50 ldc1 $f2, 0($7) 51 ll $4, 0($8) 52 lwl $4, 0($9) 53 lwr $4, 0($10) 54 55 lw $4, 0($sp) 56 lw $4, 0($t8) 57 58# CHECK-LABEL: test2: 59 60# CHECK: and $1, $1, $15 61# CHECK-NEXT: lb $4, 0($1) 62 63# Check that additional nop is inserted, to align mask and load to the next 64# bundle. 65 66# CHECK: nop 67# CHECK: nop 68 69# CHECK: and $2, $2, $15 70# CHECK-NEXT: lbu $4, 0($2) 71 72# CHECK: and $3, $3, $15 73# CHECK-NEXT: lh $4, 0($3) 74 75# CHECK: and $4, $4, $15 76# CHECK-NEXT: lhu $1, 0($4) 77 78# CHECK: and $5, $5, $15 79# CHECK-NEXT: lw $4, 0($5) 80 81# CHECK: and $6, $6, $15 82# CHECK-NEXT: lwc1 $f0, 0($6) 83 84# CHECK: and $7, $7, $15 85# CHECK-NEXT: ldc1 $f2, 0($7) 86 87# CHECK: and $8, $8, $15 88# CHECK-NEXT: ll $4, 0($8) 89 90# CHECK: and $9, $9, $15 91# CHECK-NEXT: lwl $4, 0($9) 92 93# CHECK: and $10, $10, $15 94# CHECK-NEXT: lwr $4, 0($10) 95 96 97# Check that loads where base register is $sp or $t8 (thread pointer register) 98# are not masked. 99 100# CHECK-NOT: and 101# CHECK: lw $4, 0($sp) 102# CHECK-NOT: and 103# CHECK: lw $4, 0($24) 104 105 106 107# Test that address-masking sandboxing is added before store instructions. 108 109 .align 4 110test3: 111 .set noreorder 112 113 sb $4, 0($1) 114 nop 115 sh $4, 0($2) 116 sw $4, 0($3) 117 swc1 $f0, 0($4) 118 sdc1 $f2, 0($5) 119 swl $4, 0($6) 120 swr $4, 0($7) 121 sc $4, 0($8) 122 123 sw $4, 0($sp) 124 sw $4, 0($t8) 125 126# CHECK-LABEL: test3: 127 128# CHECK: and $1, $1, $15 129# CHECK-NEXT: sb $4, 0($1) 130 131# Check that additional nop is inserted, to align mask and store to the next 132# bundle. 133 134# CHECK: nop 135# CHECK: nop 136 137# CHECK: and $2, $2, $15 138# CHECK-NEXT: sh $4, 0($2) 139 140# CHECK: and $3, $3, $15 141# CHECK-NEXT: sw $4, 0($3) 142 143# CHECK: and $4, $4, $15 144# CHECK-NEXT: swc1 $f0, 0($4) 145 146# CHECK: and $5, $5, $15 147# CHECK-NEXT: sdc1 $f2, 0($5) 148 149# CHECK: and $6, $6, $15 150# CHECK-NEXT: swl $4, 0($6) 151 152# CHECK: and $7, $7, $15 153# CHECK-NEXT: swr $4, 0($7) 154 155# CHECK: and $8, $8, $15 156# CHECK-NEXT: sc $4, 0($8) 157 158 159# Check that stores where base register is $sp or $t8 (thread pointer register) 160# are not masked. 161 162# CHECK-NOT: and 163# CHECK: sw $4, 0($sp) 164# CHECK-NOT: and 165# CHECK: sw $4, 0($24) 166 167 168 169# Test that address-masking sandboxing is added after instructions that change 170# stack pointer. 171 172 .align 4 173test4: 174 .set noreorder 175 176 addiu $sp, $sp, 24 177 nop 178 addu $sp, $sp, $1 179 lw $sp, 0($2) 180 lw $sp, 123($sp) 181 sw $sp, 123($sp) 182 183# CHECK-LABEL: test4: 184 185# CHECK: addiu $sp, $sp, 24 186# CHECK-NEXT: and $sp, $sp, $15 187 188# Check that additional nop is inserted, to align instruction and mask to the 189# next bundle. 190 191# CHECK: nop 192# CHECK: nop 193 194# CHECK: addu $sp, $sp, $1 195# CHECK-NEXT: and $sp, $sp, $15 196 197# Since we next check sandboxing sequence which consists of 3 instructions, 198# check that 2 additional nops are inserted, to align it to the next bundle. 199 200# CHECK: nop 201# CHECK: nop 202 203 204# Check that for instructions that change stack-pointer and load from memory 205# masks are added before and after the instruction. 206 207# CHECK: and $2, $2, $15 208# CHECK-NEXT: lw $sp, 0($2) 209# CHECK-NEXT: and $sp, $sp, $15 210 211# For loads where $sp is destination and base, check that mask is added after 212# but not before. 213 214# CHECK-NOT: and 215# CHECK: lw $sp, 123($sp) 216# CHECK-NEXT: and $sp, $sp, $15 217 218# For stores where $sp is destination and base, check that mask is added neither 219# before nor after. 220 221# CHECK-NOT: and 222# CHECK: sw $sp, 123($sp) 223# CHECK-NOT: and 224 225 226 227# Test that call + branch delay is aligned at bundle end. Test that mask is 228# added before indirect calls. 229 230 .align 4 231test5: 232 .set noreorder 233 234 jal func1 235 addiu $4, $zero, 1 236 237 nop 238 bal func2 239 addiu $4, $zero, 2 240 241 nop 242 nop 243 bltzal $t1, func3 244 addiu $4, $zero, 3 245 246 nop 247 nop 248 nop 249 bgezal $t2, func4 250 addiu $4, $zero, 4 251 252 jalr $t9 253 addiu $4, $zero, 5 254 255 256# CHECK: nop 257# CHECK-NEXT: nop 258# CHECK-LABEL: test5: 259# CHECK-NEXT: jal 260# CHECK-NEXT: addiu $4, $zero, 1 261 262# CHECK-NEXT: nop 263# CHECK-NEXT: nop 264# CHECK-NEXT: bal 265# CHECK-NEXT: addiu $4, $zero, 2 266 267# CHECK-NEXT: nop 268# CHECK-NEXT: nop 269# CHECK-NEXT: bltzal 270# CHECK-NEXT: addiu $4, $zero, 3 271 272# CHECK-NEXT: nop 273# CHECK-NEXT: nop 274# CHECK-NEXT: nop 275# CHECK-NEXT: nop 276 277# CHECK-NEXT: nop 278# CHECK-NEXT: nop 279# CHECK-NEXT: bgezal 280# CHECK-NEXT: addiu $4, $zero, 4 281 282# CHECK-NEXT: nop 283# CHECK-NEXT: and $25, $25, $14 284# CHECK-NEXT: jalr $25 285# CHECK-NEXT: addiu $4, $zero, 5 286 287 288 289# Test that we can put non-dangerous loads and stores in branch delay slot. 290 291 .align 4 292test6: 293 .set noreorder 294 295 jal func1 296 sw $4, 0($sp) 297 298 bal func2 299 lw $5, 0($t8) 300 301 jalr $t9 302 sw $sp, 0($sp) 303 304 305 306# CHECK: nop 307# CHECK-NEXT: nop 308# CHECK-LABEL: test6: 309# CHECK-NEXT: jal 310# CHECK-NEXT: sw $4, 0($sp) 311 312# CHECK-NEXT: nop 313# CHECK-NEXT: nop 314# CHECK-NEXT: bal 315# CHECK-NEXT: lw $5, 0($24) 316 317# CHECK-NEXT: nop 318# CHECK-NEXT: and $25, $25, $14 319# CHECK-NEXT: jalr 320# CHECK-NEXT: sw $sp, 0($sp) 321