| /external/valgrind/none/tests/mips32/ |
| D | LoadStore.stdout.exp-BE | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x80000000
[all …]
|
| D | LoadStore1.stdout.exp-LE | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x121f00
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x300007f
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x380
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x80
[all …]
|
| D | LoadStore1.stdout.exp | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x80000000
[all …]
|
| D | LoadStore.stdout.exp | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e00
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e31
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e7f
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e80
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x80
[all …]
|
| /external/valgrind/none/tests/mips64/ |
| D | load_store_multiple.stdout.exp-LE | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x121f00
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x300007f
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x380
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x80
[all …]
|
| D | load_store_multiple.stdout.exp-BE | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x80000000
[all …]
|
| D | load_store.stdout.exp-BE | 31322 swl :: offset: 0x4, out: 0x7e8763, outHI: 0x0
31323 swl :: offset: 0x5, out: 0x7e8763, outHI: 0x0
31324 swl :: offset: 0x6, out: 0x7e8763, outHI: 0x0
31325 swl :: offset: 0x7, out: 0x7e8763, outHI: 0x0
31326 swl :: offset: 0x8, out: 0x82d2ab1300000000, outHI: 0x0
31327 swl :: offset: 0x9, out: 0x82d2ab1300000000, outHI: 0x0
31328 swl :: offset: 0xa, out: 0x82d2ab1300000000, outHI: 0x0
31329 swl :: offset: 0xb, out: 0x82d2ab1300000000, outHI: 0x0
31330 swl :: offset: 0xc, out: 0x82d2ab13976d6e9a, outHI: 0x0
31331 swl :: offset: 0xd, out: 0x82d2ab13976d6e9a, outHI: 0x0
[all …]
|
| D | load_store.stdout.exp-LE | 31322 swl :: offset: 0x4, out: 0x0, outHI: 0x0
31323 swl :: offset: 0x5, out: 0x130000000000, outHI: 0x0
31324 swl :: offset: 0x6, out: 0xab130000000000, outHI: 0x0
31325 swl :: offset: 0x7, out: 0xd2ab130000000000, outHI: 0x0
31326 swl :: offset: 0x8, out: 0x82, outHI: 0x0
31327 swl :: offset: 0x9, out: 0x6382, outHI: 0x0
31328 swl :: offset: 0xa, out: 0x876382, outHI: 0x0
31329 swl :: offset: 0xb, out: 0x7e876382, outHI: 0x0
31330 swl :: offset: 0xc, out: 0x7e876382, outHI: 0x0
31331 swl :: offset: 0xd, out: 0xf3007e876382, outHI: 0x0
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | load-store-left-right.ll | 54 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
57 ; MIPS32-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
63 ; MIPS64-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
66 ; MIPS64-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
177 ; MIPS32-EL-DAG: swl $[[A1:4]], 3($[[R1:[0-9]+]])
179 ; MIPS32-EL-DAG: swl $[[A2:5]], 7($[[R1:[0-9]+]])
182 ; MIPS32-EB-DAG: swl $[[A1:4]], 0($[[R1:[0-9]+]])
184 ; MIPS32-EB-DAG: swl $[[A1:5]], 4($[[R1:[0-9]+]])
208 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
211 ; MIPS32-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
[all …]
|
| D | swzero.ll | 7 ; CHECK: swl $zero
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-loadstore-unaligned.s | 14 # CHECK-EL: swl $4, 16($5) # encoding: [0x85,0x60,0x10,0x80]
21 # CHECK-EB: swl $4, 16($5) # encoding: [0x60,0x85,0x80,0x10]
25 swl $4, 16($5)
|
| D | mips-memory-instructions.s | 13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
20 swl $4, 16($5)
|
| D | nacl-mask.s | 119 swl $4, 0($6)
150 # CHECK-NEXT: swl $4, 0($6)
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| D | invalid-mips3-wrong-error.s | 18 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | valid.s | 117 swl $15,13694($s3)
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 145 swl $15,13694($s3)
|
| /external/v8/test/cctest/ |
| D | test-assembler-mips.cc | 890 __ swl(t0, MemOperand(a0, OFFSET_OF(T, swl_0)) ); in TEST() local
895 __ swl(t1, MemOperand(a0, OFFSET_OF(T, swl_1) + 1) ); in TEST() local
900 __ swl(t2, MemOperand(a0, OFFSET_OF(T, swl_2) + 2) ); in TEST() local
905 __ swl(t3, MemOperand(a0, OFFSET_OF(T, swl_3) + 3) ); in TEST() local
|
| D | test-assembler-mips64.cc | 924 __ swl(a4, MemOperand(a0, OFFSET_OF(T, swl_0))); in TEST() local
929 __ swl(a5, MemOperand(a0, OFFSET_OF(T, swl_1) + 1)); in TEST() local
934 __ swl(a6, MemOperand(a0, OFFSET_OF(T, swl_2) + 2)); in TEST() local
939 __ swl(a7, MemOperand(a0, OFFSET_OF(T, swl_3) + 3)); in TEST() local
|
| /external/llvm/test/MC/Disassembler/Mips/mips1/ |
| D | valid-mips1.txt | 110 0xaa 0x6f 0x35 0x7e # CHECK: swl $15, 13694($19)
|
| D | valid-mips1-el.txt | 110 0x7e 0x35 0x6f 0xaa # CHECK: swl $15, 13694($19)
|
| /external/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 174 swl $15,13694($s3)
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | micromips.txt | 181 # CHECK: swl $4, 16($5)
|
| D | micromips_le.txt | 181 # CHECK: swl $4, 16($5)
|