/external/valgrind/none/tests/mips32/ |
D | LoadStore.stdout.exp-BE | 229 swr 230 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 0($t1) :: RTval: 0x0, out: 0x1f1e1f 232 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x27000000 233 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x271f1e1f 234 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0xff000000 235 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0xff1f1e1f 236 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x0 237 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x1f1e1f 238 swr $t0, 2($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
D | LoadStore1.stdout.exp-LE | 229 swr 230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27 233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27 234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xffffff 235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x3ffffff 236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x300 238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
D | LoadStore1.stdout.exp | 229 swr 230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x1e1f00 232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000 233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000 234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000 235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000 236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
D | LoadStore.stdout.exp | 229 swr 230 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0 232 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927 233 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927 234 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff 235 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff 236 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000 237 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000 238 swr $t0, 2($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
/external/valgrind/none/tests/mips64/ |
D | load_store_multiple.stdout.exp-LE | 229 swr 230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27 233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27 234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xffffff 235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x3ffffff 236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x300 238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
D | load_store_multiple.stdout.exp-BE | 229 swr 230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0 231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x1e1f00 232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000 233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000 234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000 235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000 236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0 238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x0 [all …]
|
D | load_store.stdout.exp-BE | 33358 swr :: offset: 0x4, out: 0x63000000, outHI: 0x0 33359 swr :: offset: 0x5, out: 0x63820000, outHI: 0x0 33360 swr :: offset: 0x6, out: 0x6382d200, outHI: 0x0 33361 swr :: offset: 0x7, out: 0x6382d2ab, outHI: 0x0 33362 swr :: offset: 0x8, out: 0x1300000000000000, outHI: 0x0 33363 swr :: offset: 0x9, out: 0x1397000000000000, outHI: 0x0 33364 swr :: offset: 0xa, out: 0x13976d0000000000, outHI: 0x0 33365 swr :: offset: 0xb, out: 0x13976d6e00000000, outHI: 0x0 33366 swr :: offset: 0xc, out: 0x13976d6e9a000000, outHI: 0x0 33367 swr :: offset: 0xd, out: 0x13976d6e9ac30000, outHI: 0x0 [all …]
|
D | load_store.stdout.exp-LE | 33358 swr :: offset: 0x4, out: 0x0, outHI: 0x0 33359 swr :: offset: 0x5, out: 0x0, outHI: 0x0 33360 swr :: offset: 0x6, out: 0x0, outHI: 0x0 33361 swr :: offset: 0x7, out: 0x0, outHI: 0x0 33362 swr :: offset: 0x8, out: 0x82d2ab13, outHI: 0x0 33363 swr :: offset: 0x9, out: 0x82d2ab13, outHI: 0x0 33364 swr :: offset: 0xa, out: 0x82d2ab13, outHI: 0x0 33365 swr :: offset: 0xb, out: 0x82d2ab13, outHI: 0x0 33366 swr :: offset: 0xc, out: 0x7e876382d2ab13, outHI: 0x0 33367 swr :: offset: 0xd, out: 0x7e876382d2ab13, outHI: 0x0 [all …]
|
/external/llvm/test/CodeGen/Mips/ |
D | load-store-left-right.ll | 55 ; MIPS32-EL: swr $[[R0]], 0($[[R1]]) 58 ; MIPS32-EB: swr $[[R0]], 3($[[R1]]) 64 ; MIPS64-EL: swr $[[R0]], 0($[[R1]]) 67 ; MIPS64-EB: swr $[[R0]], 3($[[R1]]) 178 ; MIPS32-EL-DAG: swr $[[A1]], 0($[[R1]]) 180 ; MIPS32-EL-DAG: swr $[[A2]], 4($[[R1]]) 183 ; MIPS32-EB-DAG: swr $[[A1]], 3($[[R1]]) 185 ; MIPS32-EB-DAG: swr $[[A1]], 7($[[R1]]) 209 ; MIPS32-EL: swr $[[R0]], 0($[[R1]]) 212 ; MIPS32-EB: swr $[[R0]], 3($[[R1]]) [all …]
|
D | swzero.ll | 8 ; CHECK: swr $zero
|
/external/llvm/test/MC/Mips/ |
D | micromips-loadstore-unaligned.s | 15 # CHECK-EL: swr $4, 16($5) # encoding: [0x85,0x60,0x10,0x90] 22 # CHECK-EB: swr $4, 16($5) # encoding: [0x60,0x85,0x90,0x10] 26 swr $4, 16($5)
|
D | nacl-mask.s | 120 swr $4, 0($7) 153 # CHECK-NEXT: swr $4, 0($7)
|
/external/llvm/test/MC/Mips/mips32r6/ |
D | invalid-mips1-wrong-error.s | 13 …swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
/external/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips1-wrong-error.s | 13 …swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
D | invalid-mips3-wrong-error.s | 19 …swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
/external/llvm/test/MC/Mips/mips1/ |
D | valid.s | 118 swr $s1,-26590($14)
|
/external/llvm/test/MC/Mips/mips2/ |
D | valid.s | 146 swr $s1,-26590($14)
|
/external/v8/test/cctest/ |
D | test-assembler-mips.cc | 911 __ swr(t0, MemOperand(a0, OFFSET_OF(T, swr_0)) ); in TEST() local 916 __ swr(t1, MemOperand(a0, OFFSET_OF(T, swr_1) + 1) ); in TEST() local 921 __ swr(t2, MemOperand(a0, OFFSET_OF(T, swr_2) + 2) ); in TEST() local 926 __ swr(t3, MemOperand(a0, OFFSET_OF(T, swr_3) + 3) ); in TEST() local
|
D | test-assembler-mips64.cc | 945 __ swr(a4, MemOperand(a0, OFFSET_OF(T, swr_0))); in TEST() local 950 __ swr(a5, MemOperand(a0, OFFSET_OF(T, swr_1) + 1)); in TEST() local 955 __ swr(a6, MemOperand(a0, OFFSET_OF(T, swr_2) + 2)); in TEST() local 960 __ swr(a7, MemOperand(a0, OFFSET_OF(T, swr_3) + 3)); in TEST() local
|
/external/llvm/test/MC/Disassembler/Mips/mips1/ |
D | valid-mips1.txt | 111 0xb9 0xd1 0x98 0x22 # CHECK: swr $17, -26590($14)
|
D | valid-mips1-el.txt | 111 0x22 0x98 0xd1 0xb9 # CHECK: swr $17, -26590($14)
|
/external/llvm/test/MC/Mips/mips32/ |
D | valid.s | 175 swr $s1,-26590($14)
|
/external/llvm/test/MC/Disassembler/Mips/ |
D | micromips.txt | 184 # CHECK: swr $4, 16($5)
|
D | micromips_le.txt | 184 # CHECK: swr $4, 16($5)
|
/external/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 211 swr $s1,-26590($14)
|