| /external/mesa3d/src/gallium/drivers/nv50/ |
| D | nv50_screen.h | 58 } tsc; member
125 nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc) in nv50_screen_tsc_unlock() argument
127 if (tsc->id >= 0) in nv50_screen_tsc_unlock()
128 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32)); in nv50_screen_tsc_unlock()
141 nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc) in nv50_screen_tsc_free() argument
143 if (tsc->id >= 0) { in nv50_screen_tsc_free()
144 screen->tsc.entries[tsc->id] = NULL; in nv50_screen_tsc_free()
145 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32)); in nv50_screen_tsc_free()
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| D | nv50_tex.c | 294 struct nv50_tsc_entry *tsc = nv50_tsc_entry(nv50->samplers[s][i]); in nv50_validate_tsc() local
296 if (!tsc) { in nv50_validate_tsc()
301 if (tsc->id < 0) { in nv50_validate_tsc()
302 tsc->id = nv50_screen_tsc_alloc(nv50->screen, tsc); in nv50_validate_tsc()
305 65536 + tsc->id * 32, in nv50_validate_tsc()
306 NOUVEAU_BO_VRAM, 32, tsc->tsc); in nv50_validate_tsc()
309 nv50->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32); in nv50_validate_tsc()
312 PUSH_DATA (push, (tsc->id << 12) | (i << 4) | 1); in nv50_validate_tsc()
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| D | nv50_state.c | 463 so->tsc[0] = (0x00026000 | in nv50_sampler_state_create()
470 so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS; in nv50_sampler_state_create()
472 so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS; in nv50_sampler_state_create()
477 so->tsc[1] |= NV50_TSC_1_MAGF_LINEAR; in nv50_sampler_state_create()
481 so->tsc[1] |= NV50_TSC_1_MAGF_NEAREST; in nv50_sampler_state_create()
487 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR; in nv50_sampler_state_create()
491 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST; in nv50_sampler_state_create()
497 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR; in nv50_sampler_state_create()
500 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST; in nv50_sampler_state_create()
504 so->tsc[1] |= NV50_TSC_1_MIPF_NONE; in nv50_sampler_state_create()
[all …]
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| D | nv50_screen.c | 766 screen->tsc.entries = screen->tic.entries + 2048; in nv50_screen_create()
802 int i = screen->tsc.next; in nv50_screen_tsc_alloc()
804 while (screen->tsc.lock[i / 32] & (1 << (i % 32))) in nv50_screen_tsc_alloc()
807 screen->tsc.next = (i + 1) & (NV50_TSC_MAX_ENTRIES - 1); in nv50_screen_tsc_alloc()
809 if (screen->tsc.entries[i]) in nv50_screen_tsc_alloc()
810 nv50_tsc_entry(screen->tsc.entries[i])->id = -1; in nv50_screen_tsc_alloc()
812 screen->tsc.entries[i] = entry; in nv50_screen_tsc_alloc()
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| D | nv50_stateobj_tex.h | 9 uint32_t tsc[8]; member
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| D | nv50_surface.c | 602 blit->sampler[0].tsc[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED | in nv50_blitctx_make_sampler()
606 blit->sampler[0].tsc[1] = in nv50_blitctx_make_sampler()
613 blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0]; in nv50_blitctx_make_sampler()
614 blit->sampler[1].tsc[1] = in nv50_blitctx_make_sampler()
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| /external/mesa3d/src/gallium/drivers/nvc0/ |
| D | nvc0_screen.h | 54 } tsc; member
124 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc) in nvc0_screen_tsc_unlock() argument
126 if (tsc->id >= 0) in nvc0_screen_tsc_unlock()
127 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32)); in nvc0_screen_tsc_unlock()
140 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc) in nvc0_screen_tsc_free() argument
142 if (tsc->id >= 0) { in nvc0_screen_tsc_free()
143 screen->tsc.entries[tsc->id] = NULL; in nvc0_screen_tsc_free()
144 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32)); in nvc0_screen_tsc_free()
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| D | nvc0_tex.c | 364 struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]); in nvc0_validate_tsc() local
368 if (!tsc) { in nvc0_validate_tsc()
372 if (tsc->id < 0) { in nvc0_validate_tsc()
373 tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc); in nvc0_validate_tsc()
376 65536 + tsc->id * 32, NOUVEAU_BO_VRAM, in nvc0_validate_tsc()
377 32, tsc->tsc); in nvc0_validate_tsc()
380 nvc0->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32); in nvc0_validate_tsc()
382 commands[n++] = (tsc->id << 12) | (i << 4) | 1; in nvc0_validate_tsc()
407 struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]); in nve4_validate_tsc() local
409 if (!tsc) { in nve4_validate_tsc()
[all …]
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| D | nvc0_screen.c | 757 screen->tsc.entries = screen->tic.entries + 2048; in nvc0_screen_create()
795 int i = screen->tsc.next; in nvc0_screen_tsc_alloc()
797 while (screen->tsc.lock[i / 32] & (1 << (i % 32))) in nvc0_screen_tsc_alloc()
800 screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1); in nvc0_screen_tsc_alloc()
802 if (screen->tsc.entries[i]) in nvc0_screen_tsc_alloc()
803 nv50_tsc_entry(screen->tsc.entries[i])->id = -1; in nvc0_screen_tsc_alloc()
805 screen->tsc.entries[i] = entry; in nvc0_screen_tsc_alloc()
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| D | nvc0_surface.c | 668 blit->sampler[0].tsc[0] = NV50_TSC_0_SRGB_CONVERSION_ALLOWED | in nvc0_blitctx_make_sampler()
672 blit->sampler[0].tsc[1] = in nvc0_blitctx_make_sampler()
679 blit->sampler[1].tsc[0] = blit->sampler[0].tsc[0]; in nvc0_blitctx_make_sampler()
680 blit->sampler[1].tsc[1] = in nvc0_blitctx_make_sampler()
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| /external/fio/ |
| D | gettime.c | 459 uint64_t tsc; member
509 uint64_t tsc; in clock_thread_fn() local
516 tsc = get_cpu_clock(); in clock_thread_fn()
520 c->tsc = tsc; in clock_thread_fn()
526 clocks = t->entries[i - 1].tsc - t->entries[0].tsc; in clock_thread_fn()
534 if (!t->entries[i - 1].tsc && !t->entries[0].tsc) in clock_thread_fn()
647 if (prev->tsc > this->tsc) { in fio_monotonic_clocktest()
648 uint64_t diff = prev->tsc - this->tsc; in fio_monotonic_clocktest()
657 log_info("\t CPU%3u: TSC=%llu, SEQ=%u\n", prev->cpu, (unsigned long long) prev->tsc, prev->seq); in fio_monotonic_clocktest()
658 log_info("\t CPU%3u: TSC=%llu, SEQ=%u\n", this->cpu, (unsigned long long) this->tsc, this->seq); in fio_monotonic_clocktest()
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| /external/libvpx/libvpx/vpx_ports/ |
| D | x86.h | 178 unsigned int tsc; in x86_readtsc() local
179 __asm__ __volatile__("rdtsc\n\t":"=a"(tsc):); in x86_readtsc()
180 return tsc; in x86_readtsc()
182 unsigned int tsc; in x86_readtsc()
183 asm volatile("rdtsc\n\t":"=a"(tsc):); in x86_readtsc()
184 return tsc; in x86_readtsc()
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| /external/linux-tools-perf/src/tools/perf/arch/x86/ |
| D | Makefile | 9 LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/tsc.o
10 LIB_H += arch/$(ARCH)/util/tsc.h
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| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | mce.h | 14 __u64 tsc; /* cpu time stamp counter */ member
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| /external/linux-tools-perf/src/tools/perf/ |
| D | Android.mk | 170 arch/x86/util/tsc.c \
171 tests/perf-time-to-tsc.c \
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| D | Makefile | 394 LIB_OBJS += $(OUTPUT)tests/perf-time-to-tsc.o
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| /external/elfutils/src/tests/ |
| D | run-readelf-mixed-corenote.sh | 256 …HWCAP: 0xafebfbff <fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflus…
458 HWCAP: 0x780abfd <fpu de pse tsc msr pae mce cx8 apic sep pge cmov mmx fxsr sse sse2>
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_build_util.cpp | 245 BuildUtil::mkTex(operation op, TexTarget targ, uint8_t tic, uint8_t tsc, in mkTex() argument
255 tex->setTexture(targ, tic, tsc); in mkTex()
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| D | nv50_ir_build_util.h | 76 Instruction *mkTex(operation, TexTarget, uint8_t tic, uint8_t tsc,
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| /external/valgrind/include/vki/ |
| D | vki-xen-x86.h | 227 vki_uint64_t tsc; member
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| /external/kernel-headers/original/uapi/linux/ |
| D | wireless.h | 870 __u8 tsc[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */ member
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| /external/icu/icu4c/source/data/zone/ |
| D | ga.txt | 862 ec{"Iacútsc"}
1894 ld{"Am Samhraidh Iacútsc"}
1895 lg{"Am Iacútsc"}
1896 ls{"Am Caighdeánach Iacútsc"}
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2011-12-06-SpillAndRestoreCR.ll | 4 ; ModuleID = 'tsc.c'
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| D | 2011-12-05-NoSpillDupCR.ll | 4 ; ModuleID = 'tsc.c'
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| /external/regex-re2/benchlog/ |
| D | benchlog.r70 | 17 flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr s…
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