Home
last modified time | relevance | path

Searched refs:uqxtn (Results 1 – 25 of 27) sorted by relevance

12

/external/llvm/test/MC/AArch64/
Dneon-scalar-extract-narrow.s34 uqxtn b18, h18
35 uqxtn h20, s17
36 uqxtn s19, d14
Darm64-fp-encoding.s437 uqxtn b4, h2
438 uqxtn h2, s3
439 uqxtn s9, d2
441 ; CHECK: uqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x7e]
442 ; CHECK: uqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x7e]
443 ; CHECK: uqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x7e]
Dneon-simd-misc.s382 uqxtn v1.8b, v9.8h
383 uqxtn v13.4h, v21.4s
384 uqxtn v4.2s, v0.2d
Darm64-arithmetic-encoding.s609 uqxtn b4, h2
610 uqxtn h2, s3
611 uqxtn s9, d2
613 ; CHECK: uqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x7e]
614 ; CHECK: uqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x7e]
615 ; CHECK: uqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x7e]
Dneon-diagnostics.s4890 uqxtn b18, b18
4891 uqxtn h20, h17
4892 uqxtn s19, s14
5723 uqxtn v0.16b, v31.8h
5724 uqxtn v2.8h, v4.4s
5725 uqxtn v6.4s, v8.2d
Darm64-advsimd.s503 uqxtn.8b v0, v0
553 ; CHECK: uqxtn.8b v0, v0 ; encoding: [0x00,0x48,0x21,0x2e]
/external/llvm/test/CodeGen/AArch64/
Darm64-vmovn.ll124 ;CHECK: uqxtn.8b v0, v0
126 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uqxtn.v8i8(<8 x i16> %A)
133 ;CHECK: uqxtn.4h v0, v0
135 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> %A)
142 ;CHECK: uqxtn.2s v0, v0
144 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uqxtn.v2i32(<2 x i64> %A)
153 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uqxtn.v8i8(<8 x i16> %A)
163 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> %A)
173 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uqxtn.v2i32(<2 x i64> %A)
178 declare <8 x i8> @llvm.aarch64.neon.uqxtn.v8i8(<8 x i16>) nounwind readnone
[all …]
Darm64-arith-saturating.ll145 ; CHECK: uqxtn s0, d0
147 %vqmovn.i = tail call i32 @llvm.aarch64.neon.scalar.uqxtn.i32.i64(i64 %vecext) nounwind
151 declare i32 @llvm.aarch64.neon.scalar.uqxtn.i32.i64(i64) nounwind readnone
/external/libavc/common/armv8/
Dih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s147 uqxtn v18.8b, v18.8h
148 uqxtn v19.8b, v19.8h
175 uqxtn v19.8b, v19.8h
176 uqxtn v25.8b, v25.8h
229 uqxtn v18.8b, v18.8h
230 uqxtn v19.8b, v19.8h
254 uqxtn v19.8b, v19.8h
255 uqxtn v25.8b, v25.8h
307 uqxtn v18.8b, v18.8h
308 uqxtn v19.8b, v19.8h
[all …]
Dih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s210 uqxtn v18.8b, v18.8h
211 uqxtn v19.8b, v19.8h
239 uqxtn v19.8b, v19.8h
240 uqxtn v18.8b, v18.8h
298 uqxtn v18.8b, v18.8h
299 uqxtn v19.8b, v19.8h
324 uqxtn v19.8b, v19.8h
325 uqxtn v18.8b, v18.8h
381 uqxtn v18.8b, v18.8h
382 uqxtn v19.8b, v19.8h
[all …]
Dih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s276 uqxtn v18.8b, v18.8h
277 uqxtn v19.8b, v19.8h
314 uqxtn v18.8b, v18.8h
315 uqxtn v19.8b, v19.8h
356 uqxtn v27.8b, v18.8h
357 uqxtn v19.8b, v19.8h
385 uqxtn v18.8b, v18.8h
386 uqxtn v19.8b, v19.8h
524 uqxtn v18.8b, v18.8h
525 uqxtn v19.8b, v19.8h
[all …]
Dih264_resi_trans_quant_av8.s591 uqxtn v14.4h, v14.4s
593 uqxtn v16.4h, v16.4s
692 uqxtn v4.4h, v4.4s
701 uqxtn v2.4h, v2.4s
/external/libhevc/common/arm64/
Dihevc_weighted_pred_uni.s197 uqxtn v4.8b, v4.8h //vqmovn_u16(sto_res_tmp3)
213 uqxtn v6.8b, v6.8h //vqmovn_u16(sto_res_tmp3) ii iteration
216 uqxtn v7.8b, v7.8h //vqmovn_u16(sto_res_tmp3) iii iteration
221 uqxtn v16.8b, v16.8h //vqmovn_u16(sto_res_tmp3) iv iteration
Dihevc_weighted_pred_bi.s252 uqxtn v4.8b,v4.8h
269 uqxtn v6.8b,v6.8h
277 uqxtn v19.8b,v19.8h
282 uqxtn v18.8b,v18.8h
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1806 # CHECK: uqxtn b18, h18
1807 # CHECK: uqxtn h20, s17
1808 # CHECK: uqxtn s19, d14
Darm64-advsimd.txt502 # CHECK: uqxtn.8b v0, v0
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c4058 GEN_UNARY_TEST(uqxtn, 2s, 2d)
4060 GEN_UNARY_TEST(uqxtn, 4h, 4s)
4062 GEN_UNARY_TEST(uqxtn, 8b, 8h)
Dfp_and_simd.stdout.exp28386 uqxtn s31, d0 420ce6934e766cbf4fda4523edf8e491 c170587dff1ba9c0afbe76ee66b2db9e 00000000000000…
28387 uqxtn h31, s0 3fec2d20b8376ed85c4647474bfc9611 a9a34105c8dddc8d64104ff70f37a22b 00000000000000…
28388 uqxtn b31, h0 ce10406e40af365570bc6950fa3b22d9 bd14ce86c6ce2d76b963201d21709cb8 00000000000000…
28398 uqxtn v8.2s, v7.2d5c17a247ae78e22a4c6b653a29e459ad 0000000000000000ffffffffffffffff fpsr=08000000
28400 uqxtn v8.4h, v7.4s07e29824a1275d451ba80bf3e37a3834 0000000000000000ffffffffffffffff fpsr=08000000
28402 uqxtn v8.8b, v7.8ha6d3baa4116cffa552cd30724e2a52e2 0000000000000000ffffffffffffffff fpsr=08000000
/external/vixl/test/
Dtest-simulator-a64.cc3967 DEFINE_TEST_NEON_2DIFF_NARROW(uqxtn, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4013 DEFINE_TEST_NEON_2DIFF_SCALAR_NARROW(uqxtn, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc2600 case NEON_UQXTN: uqxtn(vf, rd, rn); return; in VisitNEON2RegMisc()
3515 case NEON_UQXTN_scalar: uqxtn(vf, rd, rn); break; in VisitNEONScalar2RegMisc()
Dsimulator-a64.h2170 LogicVRegister uqxtn(VectorFormat vform,
Dmacro-assembler-a64.h2286 V(uqxtn, Uqxtn) \
Dassembler-a64.h2627 void uqxtn(const VRegister& vd,
Dlogic-a64.cc2129 LogicVRegister Simulator::uqxtn(VectorFormat vform, in uqxtn() function in vixl::Simulator
/external/vixl/doc/
Dsupported-instructions.md4396 void uqxtn(const VRegister& vd,

12