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/external/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll7 %v2f32 = type <2 x float>
9 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
11 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
12 ret %v2f32 %1
15 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
17 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
18 ret %v2f32 %1
21 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
23 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
24 ret %v2f32 %1
[all …]
Dvcvt-v8.ll14 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %tmp1)
30 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %tmp1)
46 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %tmp1)
62 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %tmp1)
78 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %tmp1)
94 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %tmp1)
110 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %tmp1)
126 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %tmp1)
131 declare <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
133 declare <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Dvrec.ll23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dfabs-neon.ll14 %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
17 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
42 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
53 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
Dvcvt.ll71 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
79 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
87 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
95 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
99 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
100 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
101 declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
102 declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
D2009-08-29-ExtractEltf32.ll7 …%0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwi…
25 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
D2009-11-01-NeonMoves.ll19 …%5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x …
20 …%6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x …
36 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dneon-fma.ll8 …%call = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) noun…
21 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
D2013-02-27-expand-vfma.ll26 %tmp = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %b, <2 x float> %c, <2 x float> %a) #2
30 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #1
/external/llvm/test/CodeGen/AArch64/
Darm64-vfloatintrinsics.ll5 %v2f32 = type <2 x float>
7 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
9 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
10 ret %v2f32 %1
13 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
15 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
16 ret %v2f32 %1
19 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
21 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
22 ret %v2f32 %1
[all …]
Darm64-vcvt.ll8 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float> %A)
30 declare <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
39 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float> %A)
61 declare <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float>) nounwind readnone
70 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
92 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Darm64-fminv.ll6 %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
24 declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
31 %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
49 declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>)
56 %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in)
74 declare float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float>)
81 %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in)
99 declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>)
Dsincospow-vector-expansion.ll39 %1 = call <2 x float> @llvm.cos.v2f32(<2 x float> %v1)
47 %1 = call <2 x float> @llvm.sin.v2f32(<2 x float> %v1)
55 %1 = call <2 x float> @llvm.pow.v2f32(<2 x float> %v1, <2 x float> %v2)
59 declare <2 x float> @llvm.cos.v2f32(<2 x float>)
60 declare <2 x float> @llvm.sin.v2f32(<2 x float>)
61 declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)
Darm64-vcvt_n.ll7 %vcvt_n1 = tail call <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %a, i32 9)
15 %vcvt_n1 = tail call <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %a, i32 12)
46 declare <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
47 declare <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
Darm64-vminmaxnm.ll6 …%vmaxnm2.i = tail call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> %a, <2 x float> %b)…
27 …%vminnm2.i = tail call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> %a, <2 x float> %b)…
47 declare <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
50 declare <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
Darm64-vsqrt.ll8 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
30 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
40 %tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
62 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
70 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float> %tmp1)
106 declare <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float>) nounwind readnone
135 %tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float> %tmp1)
171 declare <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float>) nounwind readnone
Dneon-fma.ll49 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)
55 %val = call <2 x float> @llvm.fma.v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C)
74 %val = call <2 x float> @llvm.fma.v2f32(<2 x float> %negA, <2 x float> %B, <2 x float> %C)
92 declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>)
98 %val = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C)
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp192 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
195 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
200 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
201 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
202 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
203 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
204 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
205 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
223 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
226 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
[all …]
DAArch64CallingConvention.td26 CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
31 CCIfBigEndian<CCIfType<[v2i32, v2f32, v4i16, v4f16, v8i8],
65 CCIfType<[v1i64, v2i32, v4i16, v8i8, v1f64, v2f32, v4f16],
74 CCIfType<[i64, f64, v1f64, v2f32, v1i64, v2i32, v4i16, v8i8, v4f16],
81 CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
86 CCIfBigEndian<CCIfType<[v2i32, v2f32, v4i16, v4f16, v8i8],
101 CCIfType<[v1i64, v2i32, v4i16, v8i8, v1f64, v2f32, v4f16],
114 CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
146 CCIfType<[v1i64, v2i32, v4i16, v8i8, v1f64, v2f32, v4f16],
156 CCIfType<[i64, f64, v1f64, v2f32, v1i64, v2i32, v4i16, v8i8, v4f16],
[all …]
DAArch64ISelDAGToDAG.cpp2266 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2284 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2302 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2320 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2338 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2356 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2374 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2392 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2410 else if (VT == MVT::v2i32 || VT == MVT::v2f32) in Select()
2426 VT == MVT::v2f32) in Select()
[all …]
/external/llvm/lib/Target/ARM/
DARMCallingConv.td27 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
46 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
60 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
79 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
95 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
146 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
156 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
174 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
189 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
DARMTargetTransformInfo.cpp58 { ISD::FP_EXTEND, MVT::v2f32, 2 }, in getCastInstrCost()
108 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
109 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
110 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
111 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
112 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
113 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
347 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
369 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
/external/clang/test/CodeGen/
Dsystemz-abi-vector.c19 typedef __attribute__((vector_size(8))) float v2f32; typedef
84 v2f32 pass_v2f32(v2f32 arg) { return arg; } in pass_v2f32()
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h97 v2f32 = 46, // 2 x f32 enumerator
219 SimpleTy == MVT::v4f16 || SimpleTy == MVT::v2f32 || in is64BitVector()
317 case v2f32: in getVectorElementType()
365 case v2f32: in getVectorNumElements()
420 case v2f32: in getSizeInBits()
572 if (NumElements == 2) return MVT::v2f32; in getVectorVT()
/external/llvm/test/CodeGen/X86/
Dvec_fabs.ll60 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
70 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
75 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %p)

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