Searched refs:widening (Results 1 – 25 of 27) sorted by relevance
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5 ; widening shuffle v3float and then a add23 ; widening shuffle v3float with a different mask and then a add41 ; Example of when widening a v3float operation causes the DAG to replace a node42 ; with the operation that we are currently widening, i.e. when replacing67 ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
2 ; RUN: llc < %s -march=x86-64 -mcpu=core2 -mattr=+sse2 -x86-experimental-vector-widening-legalizati…13 ; pshufd+paddq+pshufd. This is fixed with the widening legalization.73 ; the widening legalization.110 ; single paddw instruction. This is fixed with the widening legalization.154 ; pshufd+paddw+pshufd. This is fixed with the widening legalization.
3 ; Test bit convert that requires widening in the operand.
4 ; Check that widening doesn't introduce a mmx register in this case when
1 ; RUN: llc < %s -mcpu=x86-64 -x86-experimental-vector-widening-legalization | FileCheck %s
39 ; condition operand and widening the resulting vselect for the v4f32 result.
1 …6_64-apple-darwin -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | Fi…
5 ; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
2 ; RUN: llc < %s -march=x86 -mattr=+sse4.2 -x86-experimental-vector-widening-legalization | FileChec…
3 ; Verify when widening a divide/remainder operation, we only generate a
2 …86-apple-darwin10 -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | Fi…
121 ; widening select v6i32 and then a sub
4 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s --che…
2 ; TSAN conflicts with load widening. Make sure the load widening is off with -tsan.
79 ; Eliminate %ofs1 after widening outercount.102 ; Eliminate %ofs2 after widening inneriv.131 ; Eliminate %ofs4 after widening outercount
4 ; for widening.
16 ; - The VMOVS widening is happening.
322 ; once under rare circumstances. When widening a register from QPR to DTriple
2 ; ASAN conflicts with load widening iff the widened load accesses data out of bounds
53 ; requiring widening.
19 // *widening* operations; if you need to convert to a *narrower* floating-point
247 if (instr->GXin.Mul.widening == False) { in ppTILEGXInstr()790 i->GXin.Mul.widening = wid; /* widen=True else False */ in TILEGXInstr_Mul()2031 Bool widening = i->GXin.Mul.widening; in emit_TILEGXInstr() local2037 vassert(widening); // always widen. in emit_TILEGXInstr()
388 Bool widening; //True => widening, False => non-widening member
426 Bool widening; /* True => widening, False => non-widening */ member
823 i->Min.Mul.widening = wid; /* widen=True else False */ in MIPSInstr_Mul()1233 switch (i->Min.Mul.widening) { in ppMIPSInstr()2806 Bool widening = i->Min.Mul.widening; in emit_MIPSInstr() local2811 if (widening) { in emit_MIPSInstr()