1; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
2; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE
3
4define <8 x float> @foo1_8(<8 x i8> %src) {
5; CHECK-LABEL: foo1_8:
6; CHECK:       ## BB#0:
7; CHECK-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm0[4,4,5,5,6,6,7,7]
8; CHECK-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
9; CHECK-NEXT:    vpslld $24, %xmm0, %xmm0
10; CHECK-NEXT:    vpsrad $24, %xmm0, %xmm0
11; CHECK-NEXT:    vpslld $24, %xmm1, %xmm1
12; CHECK-NEXT:    vpsrad $24, %xmm1, %xmm1
13; CHECK-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
14; CHECK-NEXT:    vcvtdq2ps %ymm0, %ymm0
15; CHECK-NEXT:    retl
16;
17; CHECK-WIDE-LABEL: foo1_8:
18; CHECK-WIDE:       ## BB#0:
19; CHECK-WIDE-NEXT:    vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
20; CHECK-WIDE-NEXT:    vpslld $24, %xmm1, %xmm1
21; CHECK-WIDE-NEXT:    vpsrad $24, %xmm1, %xmm1
22; CHECK-WIDE-NEXT:    vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
23; CHECK-WIDE-NEXT:    vpunpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
24; CHECK-WIDE-NEXT:    vpslld $24, %xmm0, %xmm0
25; CHECK-WIDE-NEXT:    vpsrad $24, %xmm0, %xmm0
26; CHECK-WIDE-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
27; CHECK-WIDE-NEXT:    vcvtdq2ps %ymm0, %ymm0
28; CHECK-WIDE-NEXT:    retl
29  %res = sitofp <8 x i8> %src to <8 x float>
30  ret <8 x float> %res
31}
32
33define <4 x float> @foo1_4(<4 x i8> %src) {
34; CHECK-LABEL: foo1_4:
35; CHECK:       ## BB#0:
36; CHECK-NEXT:    vpslld $24, %xmm0, %xmm0
37; CHECK-NEXT:    vpsrad $24, %xmm0, %xmm0
38; CHECK-NEXT:    vcvtdq2ps %xmm0, %xmm0
39; CHECK-NEXT:    retl
40;
41; CHECK-WIDE-LABEL: foo1_4:
42; CHECK-WIDE:       ## BB#0:
43; CHECK-WIDE-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
44; CHECK-WIDE-NEXT:    vpslld $24, %xmm0, %xmm0
45; CHECK-WIDE-NEXT:    vpsrad $24, %xmm0, %xmm0
46; CHECK-WIDE-NEXT:    vcvtdq2ps %xmm0, %xmm0
47; CHECK-WIDE-NEXT:    retl
48  %res = sitofp <4 x i8> %src to <4 x float>
49  ret <4 x float> %res
50}
51
52define <8 x float> @foo2_8(<8 x i8> %src) {
53; CHECK-LABEL: foo2_8:
54; CHECK:       ## BB#0:
55; CHECK-NEXT:    vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
56; CHECK-NEXT:    vpunpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
57; CHECK-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
58; CHECK-NEXT:    vandps LCPI2_0, %ymm0, %ymm0
59; CHECK-NEXT:    vcvtdq2ps %ymm0, %ymm0
60; CHECK-NEXT:    retl
61;
62; CHECK-WIDE-LABEL: foo2_8:
63; CHECK-WIDE:       ## BB#0:
64; CHECK-WIDE-NEXT:    vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
65; CHECK-WIDE-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
66; CHECK-WIDE-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
67; CHECK-WIDE-NEXT:    vcvtdq2ps %ymm0, %ymm0
68; CHECK-WIDE-NEXT:    retl
69  %res = uitofp <8 x i8> %src to <8 x float>
70  ret <8 x float> %res
71}
72
73define <4 x float> @foo2_4(<4 x i8> %src) {
74; CHECK-LABEL: foo2_4:
75; CHECK:       ## BB#0:
76; CHECK-NEXT:    vandps LCPI3_0, %xmm0, %xmm0
77; CHECK-NEXT:    vcvtdq2ps %xmm0, %xmm0
78; CHECK-NEXT:    retl
79;
80; CHECK-WIDE-LABEL: foo2_4:
81; CHECK-WIDE:       ## BB#0:
82; CHECK-WIDE-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
83; CHECK-WIDE-NEXT:    vcvtdq2ps %xmm0, %xmm0
84; CHECK-WIDE-NEXT:    retl
85  %res = uitofp <4 x i8> %src to <4 x float>
86  ret <4 x float> %res
87}
88
89define <8 x i8> @foo3_8(<8 x float> %src) {
90; CHECK-LABEL: foo3_8:
91; CHECK:       ## BB#0:
92; CHECK-NEXT:    vcvttps2dq %ymm0, %ymm0
93; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
94; CHECK-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
95; CHECK-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
96; CHECK-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
97; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
98; CHECK-NEXT:    vzeroupper
99; CHECK-NEXT:    retl
100;
101; CHECK-WIDE-LABEL: foo3_8:
102; CHECK-WIDE:       ## BB#0:
103; CHECK-WIDE-NEXT:    vcvttss2si %xmm0, %eax
104; CHECK-WIDE-NEXT:    vpinsrb $0, %eax, %xmm0, %xmm1
105; CHECK-WIDE-NEXT:    vmovshdup %xmm0, %xmm2    ## xmm2 = xmm0[1,1,3,3]
106; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
107; CHECK-WIDE-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
108; CHECK-WIDE-NEXT:    vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
109; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
110; CHECK-WIDE-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
111; CHECK-WIDE-NEXT:    vpermilps $231, %xmm0, %xmm2 ## xmm2 = xmm0[3,1,2,3]
112; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
113; CHECK-WIDE-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm1
114; CHECK-WIDE-NEXT:    vextractf128 $1, %ymm0, %xmm0
115; CHECK-WIDE-NEXT:    vcvttss2si %xmm0, %eax
116; CHECK-WIDE-NEXT:    vpinsrb $4, %eax, %xmm1, %xmm1
117; CHECK-WIDE-NEXT:    vmovshdup %xmm0, %xmm2    ## xmm2 = xmm0[1,1,3,3]
118; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
119; CHECK-WIDE-NEXT:    vpinsrb $5, %eax, %xmm1, %xmm1
120; CHECK-WIDE-NEXT:    vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
121; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
122; CHECK-WIDE-NEXT:    vpinsrb $6, %eax, %xmm1, %xmm1
123; CHECK-WIDE-NEXT:    vpermilps $231, %xmm0, %xmm0 ## xmm0 = xmm0[3,1,2,3]
124; CHECK-WIDE-NEXT:    vcvttss2si %xmm0, %eax
125; CHECK-WIDE-NEXT:    vpinsrb $7, %eax, %xmm1, %xmm0
126; CHECK-WIDE-NEXT:    vzeroupper
127; CHECK-WIDE-NEXT:    retl
128  %res = fptosi <8 x float> %src to <8 x i8>
129  ret <8 x i8> %res
130}
131
132define <4 x i8> @foo3_4(<4 x float> %src) {
133; CHECK-LABEL: foo3_4:
134; CHECK:       ## BB#0:
135; CHECK-NEXT:    vcvttps2dq %xmm0, %xmm0
136; CHECK-NEXT:    retl
137;
138; CHECK-WIDE-LABEL: foo3_4:
139; CHECK-WIDE:       ## BB#0:
140; CHECK-WIDE-NEXT:    vcvttss2si %xmm0, %eax
141; CHECK-WIDE-NEXT:    vpinsrb $0, %eax, %xmm0, %xmm1
142; CHECK-WIDE-NEXT:    vmovshdup %xmm0, %xmm2    ## xmm2 = xmm0[1,1,3,3]
143; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
144; CHECK-WIDE-NEXT:    vpinsrb $1, %eax, %xmm1, %xmm1
145; CHECK-WIDE-NEXT:    vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
146; CHECK-WIDE-NEXT:    vcvttss2si %xmm2, %eax
147; CHECK-WIDE-NEXT:    vpinsrb $2, %eax, %xmm1, %xmm1
148; CHECK-WIDE-NEXT:    vpermilps $231, %xmm0, %xmm0 ## xmm0 = xmm0[3,1,2,3]
149; CHECK-WIDE-NEXT:    vcvttss2si %xmm0, %eax
150; CHECK-WIDE-NEXT:    vpinsrb $3, %eax, %xmm1, %xmm0
151; CHECK-WIDE-NEXT:    retl
152  %res = fptosi <4 x float> %src to <4 x i8>
153  ret <4 x i8> %res
154}
155
156