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Searched refs:zero_reg (Results 1 – 25 of 50) sorted by relevance

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/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_variance_impl_intrin_avx2.c22 __m256i zero_reg = _mm256_set1_epi16(0); in vp9_get16x16var_avx2() local
42 src_expand_low = _mm256_unpacklo_epi8(src, zero_reg); in vp9_get16x16var_avx2()
43 src_expand_high = _mm256_unpackhi_epi8(src, zero_reg); in vp9_get16x16var_avx2()
45 ref_expand_low = _mm256_unpacklo_epi8(ref, zero_reg); in vp9_get16x16var_avx2()
46 ref_expand_high = _mm256_unpackhi_epi8(ref, zero_reg); in vp9_get16x16var_avx2()
85 expand_sum_low = _mm_unpacklo_epi16(_mm256_castsi256_si128(zero_reg), in vp9_get16x16var_avx2()
87 expand_sum_high = _mm_unpackhi_epi16(_mm256_castsi256_si128(zero_reg), in vp9_get16x16var_avx2()
98 _mm256_castsi256_si128(zero_reg)); in vp9_get16x16var_avx2()
100 _mm256_castsi256_si128(zero_reg)); in vp9_get16x16var_avx2()
105 _mm256_castsi256_si128(zero_reg)); in vp9_get16x16var_avx2()
[all …]
Dvp9_subpel_variance_impl_intrin_avx2.c85 exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
86 exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
101 res_cmp = _mm256_cmpgt_epi16(zero_reg, sum_reg); \
131 __m256i zero_reg; in vp9_sub_pixel_variance32xh_avx2() local
135 zero_reg = _mm256_set1_epi16(0); in vp9_sub_pixel_variance32xh_avx2()
143 MERGE_WITH_SRC(src_reg, zero_reg) in vp9_sub_pixel_variance32xh_avx2()
155 MERGE_WITH_SRC(src_reg, zero_reg) in vp9_sub_pixel_variance32xh_avx2()
185 MERGE_WITH_SRC(src_reg, zero_reg) in vp9_sub_pixel_variance32xh_avx2()
205 MERGE_WITH_SRC(src_avg, zero_reg) in vp9_sub_pixel_variance32xh_avx2()
269 MERGE_WITH_SRC(src_pack, zero_reg) in vp9_sub_pixel_variance32xh_avx2()
[all …]
Dvp9_error_intrin_avx2.c25 const __m256i zero_reg = _mm256_set1_epi16(0); in vp9_block_error_avx2() local
42 exp_dqcoeff_lo = _mm256_unpacklo_epi32(dqcoeff_reg, zero_reg); in vp9_block_error_avx2()
43 exp_dqcoeff_hi = _mm256_unpackhi_epi32(dqcoeff_reg, zero_reg); in vp9_block_error_avx2()
45 exp_coeff_lo = _mm256_unpacklo_epi32(coeff_reg, zero_reg); in vp9_block_error_avx2()
46 exp_coeff_hi = _mm256_unpackhi_epi32(coeff_reg, zero_reg); in vp9_block_error_avx2()
/external/v8/src/mips/
Dmacro-assembler-mips.cc193 Branch(&ok, eq, t8, Operand(zero_reg)); in RecordWriteField()
262 Branch(&ok, eq, at, Operand(zero_reg)); in RecordWriteForMap()
394 Branch(&done, eq, t8, Operand(zero_reg)); in RememberedSetHelper()
397 Ret(eq, t8, Operand(zero_reg)); in RememberedSetHelper()
428 scratch, Operand(zero_reg)); in CheckAccessGlobalProxy()
499 nor(scratch, reg0, zero_reg); in GetNumberHash()
599 Branch(miss, ne, at, Operand(zero_reg)); in LoadFromNumberDictionary()
937 subu(at, zero_reg, rt.rm()); in Ror()
956 lw(zero_reg, rs); in Pref()
1000 addiu(rd, zero_reg, j.imm32_); in li()
[all …]
Dassembler-mips.cc179 zero_reg, in ToRegister()
600 Register nop_rt_reg = (type == 0) ? zero_reg : at; in IsNop()
602 rd == static_cast<uint32_t>(ToNumber(zero_reg)) && in IsNop()
1164 beq(zero_reg, zero_reg, offset); in b()
1170 bgezal(zero_reg, offset); in bal()
1190 DCHECK(!(rt.is(zero_reg))); in bgezc()
1197 DCHECK(!(rs.is(zero_reg))); in bgeuc()
1198 DCHECK(!(rt.is(zero_reg))); in bgeuc()
1206 DCHECK(!(rs.is(zero_reg))); in bgec()
1207 DCHECK(!(rt.is(zero_reg))); in bgec()
[all …]
Dlithium-codegen-mips.cc841 __ Branch(&no_deopt, ne, a1, Operand(zero_reg)); in DeoptimizeIf()
1115 __ Branch(&dividend_is_not_negative, ge, dividend, Operand(zero_reg)); in DoModByPowerOf2I()
1117 __ subu(dividend, zero_reg, dividend); in DoModByPowerOf2I()
1120 DeoptimizeIf(eq, instr, dividend, Operand(zero_reg)); in DoModByPowerOf2I()
1123 __ subu(dividend, zero_reg, dividend); in DoModByPowerOf2I()
1151 __ Branch(&remainder_not_zero, ne, result, Operand(zero_reg)); in DoModByConstI()
1152 DeoptimizeIf(lt, instr, dividend, Operand(zero_reg)); in DoModByConstI()
1171 DeoptimizeIf(eq, instr, right_reg, Operand(zero_reg)); in DoModI()
1184 __ mov(result_reg, zero_reg); in DoModI()
1190 __ Branch(&done, ge, left_reg, Operand(zero_reg)); in DoModI()
[all …]
Dcode-stubs-mips.cc160 __ ctc1(zero_reg, FCSR); in Generate()
178 __ Branch(&error, ne, scratch, Operand(zero_reg)); in Generate()
202 __ Movz(result_reg, zero_reg, scratch); in Generate()
203 __ Branch(&done, eq, scratch, Operand(zero_reg)); in Generate()
212 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg)); in Generate()
213 __ mov(result_reg, zero_reg); in Generate()
230 __ mov(input_high, zero_reg); in Generate()
249 __ Branch(&pos_shift, ge, scratch, Operand(zero_reg)); in Generate()
252 __ Subu(scratch, zero_reg, scratch); in Generate()
265 __ Subu(result_reg, zero_reg, input_high); in Generate()
[all …]
Dregexp-macro-assembler-mips.cc190 BranchOrBacktrack(&not_at_start, ne, a0, Operand(zero_reg)); in CheckAtStart()
203 BranchOrBacktrack(on_not_at_start, ne, a0, Operand(zero_reg)); in CheckNotAtStart()
238 __ Branch(&fallthrough, eq, a1, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
242 BranchOrBacktrack(on_no_match, gt, t5, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
335 BranchOrBacktrack(on_no_match, eq, v0, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
355 __ Branch(&fallthrough, eq, a1, Operand(zero_reg)); in CheckNotBackReference()
359 BranchOrBacktrack(on_no_match, gt, t5, Operand(zero_reg)); in CheckNotBackReference()
399 Operand rhs = (c == 0) ? Operand(zero_reg) : Operand(c); in CheckCharacterAfterAnd()
408 Operand rhs = (c == 0) ? Operand(zero_reg) : Operand(c); in CheckNotCharacterAfterAnd()
457 BranchOrBacktrack(on_bit_set, ne, a0, Operand(zero_reg)); in CheckBitInTable()
[all …]
Dbuiltins-mips.cc105 t0, Operand(zero_reg)); in Generate_InternalArrayCode()
135 t0, Operand(zero_reg)); in Generate_ArrayCode()
168 __ Branch(&no_arguments, eq, a0, Operand(zero_reg)); in Generate_StringConstructCode()
211 t0, Operand(zero_reg)); in Generate_StringConstructCode()
237 __ Branch(&convert_argument, ne, t0, Operand(zero_reg)); in Generate_StringConstructCode()
365 __ Branch(&rt_call, ne, a2, Operand(zero_reg)); in Generate_JSConstructStubHelper()
401 __ mov(t2, zero_reg); in Generate_JSConstructStubHelper()
513 __ Branch(&allocated, eq, a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
515 a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
669 __ Branch(&loop, greater_equal, a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
[all …]
Dfull-codegen-mips.cc65 __ BranchShort(target, eq, at, Operand(zero_reg)); in EmitJumpIfNotSmi()
76 __ BranchShort(target, ne, at, Operand(zero_reg)); in EmitJumpIfSmi()
83 __ andi(zero_reg, reg, delta_to_patch_site % kImm16Mask); in EmitPatchInfo()
188 __ Branch(&loop_header, ne, a2, Operand(zero_reg)); in Generate()
343 __ mov(v0, zero_reg); in ClearAccumulator()
382 __ slt(at, a3, zero_reg); in EmitBackEdgeBookkeeping()
383 __ beq(at, zero_reg, &ok); in EmitBackEdgeBookkeeping()
424 __ Branch(&ok, ge, a3, Operand(zero_reg)); in EmitReturnSequence()
688 __ mov(at, zero_reg); in DoTest()
857 __ mov(a0, zero_reg); // Smi::FromInt(0) indicates no initial value. in VisitVariableDeclaration()
[all …]
Dmacro-assembler-mips.h168 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
169 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
189 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
473 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && in GetCodeMarker()
474 rs == static_cast<uint32_t>(ToNumber(zero_reg))); in GetCodeMarker()
621 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } in mov()
1154 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1160 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1164 Ret(lt, overflow_check, Operand(zero_reg), bd);
1168 Ret(ge, overflow_check, Operand(zero_reg), bd);
[all …]
Dcodegen-mips.cc121 __ bne(t2, zero_reg, &lastb); in CreateMemCopyUint8Function()
130 __ bne(t8, zero_reg, &unaligned); in CreateMemCopyUint8Function()
131 __ subu(a3, zero_reg, a0); // In delay slot. in CreateMemCopyUint8Function()
134 __ beq(a3, zero_reg, &aligned); // Already aligned. in CreateMemCopyUint8Function()
183 __ Branch(USE_DELAY_SLOT, &skip_pref, gt, v1, Operand(zero_reg)); in CreateMemCopyUint8Function()
277 __ Branch(&leave, le, a2, Operand(zero_reg)); in CreateMemCopyUint8Function()
296 __ beq(a3, zero_reg, &ua_chk16w); in CreateMemCopyUint8Function()
349 __ Branch(USE_DELAY_SLOT, &ua_skip_pref, gt, v1, Operand(zero_reg)); in CreateMemCopyUint8Function()
384 __ Branch(USE_DELAY_SLOT, &ua_skip_pref, gt, v1, Operand(zero_reg)); in CreateMemCopyUint8Function()
583 __ beq(a2, zero_reg, &leave); in CreateMemCopyUint8Function()
[all …]
Dcode-stubs-mips.h157 masm->instr_at_put(pos, BNE | (zero_reg.code() << kRsShift) | in PatchBranchIntoNop()
158 (zero_reg.code() << kRtShift) | (offset & kImm16Mask)); in PatchBranchIntoNop()
164 masm->instr_at_put(pos, BEQ | (zero_reg.code() << kRsShift) | in PatchNopIntoBranch()
165 (zero_reg.code() << kRtShift) | (offset & kImm16Mask)); in PatchNopIntoBranch()
/external/v8/src/mips64/
Dmacro-assembler-mips64.cc196 Branch(&ok, eq, t8, Operand(zero_reg)); in RecordWriteField()
265 Branch(&ok, eq, at, Operand(zero_reg)); in RecordWriteForMap()
398 Branch(&done, eq, t8, Operand(zero_reg)); in RememberedSetHelper()
401 Ret(eq, t8, Operand(zero_reg)); in RememberedSetHelper()
432 scratch, Operand(zero_reg)); in CheckAccessGlobalProxy()
504 nor(scratch, reg0, zero_reg); in GetNumberHash()
604 Branch(miss, ne, at, Operand(zero_reg)); in LoadFromNumberDictionary()
1014 subu(at, zero_reg, rt.rm()); in Ror()
1110 daddiu(rd, zero_reg, (j.imm64_ & kImm16Mask)); in li()
1112 ori(rd, zero_reg, (j.imm64_ & kImm16Mask)); in li()
[all …]
Dassembler-mips64.cc157 zero_reg, in ToRegister()
572 Register nop_rt_reg = (type == 0) ? zero_reg : at; in IsNop()
574 rd == static_cast<uint32_t>(ToNumber(zero_reg)) && in IsNop()
1143 beq(zero_reg, zero_reg, offset); in b()
1149 bgezal(zero_reg, offset); in bal()
1169 DCHECK(!(rt.is(zero_reg))); in bgezc()
1176 DCHECK(!(rs.is(zero_reg))); in bgeuc()
1177 DCHECK(!(rt.is(zero_reg))); in bgeuc()
1185 DCHECK(!(rs.is(zero_reg))); in bgec()
1186 DCHECK(!(rt.is(zero_reg))); in bgec()
[all …]
Dlithium-codegen-mips64.cc791 __ Branch(&no_deopt, ne, a1, Operand(zero_reg)); in DeoptimizeIf()
1065 __ Branch(&dividend_is_not_negative, ge, dividend, Operand(zero_reg)); in DoModByPowerOf2I()
1067 __ dsubu(dividend, zero_reg, dividend); in DoModByPowerOf2I()
1070 DeoptimizeIf(eq, instr, dividend, Operand(zero_reg)); in DoModByPowerOf2I()
1073 __ dsubu(dividend, zero_reg, dividend); in DoModByPowerOf2I()
1101 __ Branch(&remainder_not_zero, ne, result, Operand(zero_reg)); in DoModByConstI()
1102 DeoptimizeIf(lt, instr, dividend, Operand(zero_reg)); in DoModByConstI()
1121 DeoptimizeIf(eq, instr, right_reg, Operand(zero_reg)); in DoModI()
1134 __ mov(result_reg, zero_reg); in DoModI()
1140 __ Branch(&done, ge, left_reg, Operand(zero_reg)); in DoModI()
[all …]
Dcode-stubs-mips64.cc158 __ ctc1(zero_reg, FCSR); in Generate()
176 __ Branch(&error, ne, scratch, Operand(zero_reg)); in Generate()
198 __ Movz(result_reg, zero_reg, scratch); in Generate()
199 __ Branch(&done, eq, scratch, Operand(zero_reg)); in Generate()
208 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg)); in Generate()
209 __ mov(result_reg, zero_reg); in Generate()
226 __ mov(input_high, zero_reg); in Generate()
245 __ Branch(&pos_shift, ge, scratch, Operand(zero_reg)); in Generate()
248 __ Subu(scratch, zero_reg, scratch); in Generate()
261 __ Subu(result_reg, zero_reg, input_high); in Generate()
[all …]
Dregexp-macro-assembler-mips64.cc226 BranchOrBacktrack(&not_at_start, ne, a0, Operand(zero_reg)); in CheckAtStart()
239 BranchOrBacktrack(on_not_at_start, ne, a0, Operand(zero_reg)); in CheckNotAtStart()
274 __ Branch(&fallthrough, eq, a1, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
278 BranchOrBacktrack(on_no_match, gt, t1, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
371 BranchOrBacktrack(on_no_match, eq, v0, Operand(zero_reg)); in CheckNotBackReferenceIgnoreCase()
391 __ Branch(&fallthrough, eq, a1, Operand(zero_reg)); in CheckNotBackReference()
395 BranchOrBacktrack(on_no_match, gt, t1, Operand(zero_reg)); in CheckNotBackReference()
435 Operand rhs = (c == 0) ? Operand(zero_reg) : Operand(c); in CheckCharacterAfterAnd()
444 Operand rhs = (c == 0) ? Operand(zero_reg) : Operand(c); in CheckNotCharacterAfterAnd()
493 BranchOrBacktrack(on_bit_set, ne, a0, Operand(zero_reg)); in CheckBitInTable()
[all …]
Dbuiltins-mips64.cc104 a4, Operand(zero_reg)); in Generate_InternalArrayCode()
134 a4, Operand(zero_reg)); in Generate_ArrayCode()
167 __ Branch(&no_arguments, eq, a0, Operand(zero_reg)); in Generate_StringConstructCode()
210 a4, Operand(zero_reg)); in Generate_StringConstructCode()
236 __ Branch(&convert_argument, ne, a4, Operand(zero_reg)); in Generate_StringConstructCode()
365 __ Branch(&rt_call, ne, a2, Operand(zero_reg)); in Generate_JSConstructStubHelper()
404 __ mov(a6, zero_reg); in Generate_JSConstructStubHelper()
523 __ Branch(&allocated, eq, a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
525 a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
681 __ Branch(&loop, greater_equal, a3, Operand(zero_reg)); in Generate_JSConstructStubHelper()
[all …]
Dfull-codegen-mips64.cc65 __ BranchShort(target, eq, at, Operand(zero_reg)); in EmitJumpIfNotSmi()
76 __ BranchShort(target, ne, at, Operand(zero_reg)); in EmitJumpIfSmi()
83 __ andi(zero_reg, reg, delta_to_patch_site % kImm16Mask); in EmitPatchInfo()
185 __ Branch(&loop_header, ne, a2, Operand(zero_reg)); in Generate()
339 __ mov(v0, zero_reg); in ClearAccumulator()
378 __ slt(at, a3, zero_reg); in EmitBackEdgeBookkeeping()
379 __ beq(at, zero_reg, &ok); in EmitBackEdgeBookkeeping()
420 __ Branch(&ok, ge, a3, Operand(zero_reg)); in EmitReturnSequence()
684 __ mov(at, zero_reg); in DoTest()
853 __ mov(a0, zero_reg); // Smi::FromInt(0) indicates no initial value. in VisitVariableDeclaration()
[all …]
Dcodegen-mips64.cc128 __ bne(a6, zero_reg, &lastb); in CreateMemCopyUint8Function()
137 __ bne(t8, zero_reg, &unaligned); in CreateMemCopyUint8Function()
138 __ subu(a3, zero_reg, a0); // In delay slot. in CreateMemCopyUint8Function()
141 __ beq(a3, zero_reg, &aligned); // Already aligned. in CreateMemCopyUint8Function()
184 __ Branch(USE_DELAY_SLOT, &skip_pref, gt, v1, Operand(zero_reg)); in CreateMemCopyUint8Function()
278 __ Branch(&leave, le, a2, Operand(zero_reg)); in CreateMemCopyUint8Function()
297 __ beq(a3, zero_reg, &ua_chk16w); in CreateMemCopyUint8Function()
340 __ Branch(USE_DELAY_SLOT, &ua_skip_pref, gt, v1, Operand(zero_reg)); in CreateMemCopyUint8Function()
478 __ beq(a2, zero_reg, &leave); in CreateMemCopyUint8Function()
889 __ Branch(&check_sequential, eq, at, Operand(zero_reg)); in Generate()
[all …]
Dmacro-assembler-mips64.h189 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
190 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
210 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
494 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && in GetCodeMarker()
495 rs == static_cast<uint32_t>(ToNumber(zero_reg))); in GetCodeMarker()
641 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } in mov()
1180 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1186 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1190 Ret(lt, overflow_check, Operand(zero_reg), bd);
1194 Ret(ge, overflow_check, Operand(zero_reg), bd);
[all …]
Dcode-stubs-mips64.h159 masm->instr_at_put(pos, BNE | (zero_reg.code() << kRsShift) | in PatchBranchIntoNop()
160 (zero_reg.code() << kRtShift) | (offset & kImm16Mask)); in PatchBranchIntoNop()
166 masm->instr_at_put(pos, BEQ | (zero_reg.code() << kRsShift) | in PatchNopIntoBranch()
167 (zero_reg.code() << kRtShift) | (offset & kImm16Mask)); in PatchNopIntoBranch()
/external/v8/src/ic/mips/
Dic-mips.cc75 __ Branch(miss, ne, at, Operand(zero_reg)); in GenerateDictionaryLoad()
123 __ Branch(miss, ne, at, Operand(zero_reg)); in GenerateDictionaryStore()
151 __ Branch(slow, ne, at, Operand(zero_reg)); in GenerateKeyedLoadReceiverCheck()
238 __ Branch(index_string, eq, at, Operand(zero_reg)); in GenerateKeyNameCheck()
246 __ Branch(not_unique, ne, at, Operand(zero_reg)); in GenerateKeyNameCheck()
316 __ Branch(slow_case, ne, scratch1, Operand(zero_reg)); in GenerateMappedArgumentsLookup()
547 __ Branch(&property_array_property, ge, t1, Operand(zero_reg)); in GenerateGeneric()
802 __ Branch(&slow, ne, t0, Operand(zero_reg)); in GenerateGeneric()
958 Assembler::GetRt(instr) == static_cast<uint32_t>(zero_reg.code()); in HasInlinedSmiCode()
970 Assembler::GetRt(instr) == static_cast<uint32_t>(zero_reg.code()))) { in PatchInlinedSmiCode()
/external/v8/src/ic/mips64/
Dic-mips64.cc75 __ Branch(miss, ne, at, Operand(zero_reg)); in GenerateDictionaryLoad()
122 __ Branch(miss, ne, at, Operand(zero_reg)); in GenerateDictionaryStore()
150 __ Branch(slow, ne, at, Operand(zero_reg)); in GenerateKeyedLoadReceiverCheck()
237 __ Branch(index_string, eq, at, Operand(zero_reg)); in GenerateKeyNameCheck()
245 __ Branch(not_unique, ne, at, Operand(zero_reg)); in GenerateKeyNameCheck()
314 __ Branch(slow_case, ne, scratch1, Operand(zero_reg)); in GenerateMappedArgumentsLookup()
550 __ Branch(&property_array_property, ge, a5, Operand(zero_reg)); in GenerateGeneric()
811 __ Branch(&slow, ne, a4, Operand(zero_reg)); in GenerateGeneric()
965 Assembler::GetRt(instr) == static_cast<uint32_t>(zero_reg.code()); in HasInlinedSmiCode()
977 Assembler::GetRt(instr) == static_cast<uint32_t>(zero_reg.code()))) { in PatchInlinedSmiCode()

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