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Searched refs:Rd (Results 1 – 11 of 11) sorted by relevance

/system/core/libpixelflinger/codeflinger/
DARMAssemblerInterface.h123 int Rd, int Rn,
128 int Rd, int Rm, int Rs, int Rn) = 0;
130 int Rd, int Rm, int Rs) = 0;
153 virtual void LDR (int cc, int Rd,
155 virtual void LDRB(int cc, int Rd,
157 virtual void STR (int cc, int Rd,
159 virtual void STRB(int cc, int Rd,
162 virtual void LDRH (int cc, int Rd,
164 virtual void LDRSB(int cc, int Rd,
166 virtual void LDRSH(int cc, int Rd,
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DARMAssemblerProxy.cpp161 int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
163 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2); in dataProcessing()
166 void ARMAssemblerProxy::MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) { in MLA() argument
167 mTarget->MLA(cc, s, Rd, Rm, Rs, Rn); in MLA()
169 void ARMAssemblerProxy::MUL(int cc, int s, int Rd, int Rm, int Rs) { in MUL() argument
170 mTarget->MUL(cc, s, Rd, Rm, Rs); in MUL()
212 void ARMAssemblerProxy::LDR(int cc, int Rd, int Rn, uint32_t offset) { in LDR() argument
213 mTarget->LDR(cc, Rd, Rn, offset); in LDR()
215 void ARMAssemblerProxy::LDRB(int cc, int Rd, int Rn, uint32_t offset) { in LDRB() argument
216 mTarget->LDRB(cc, Rd, Rn, offset); in LDRB()
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DArm64Assembler.cpp341 int s, int Rd, int Rn, uint32_t Op2) in dataProcessingCommon() argument
398 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
399 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
400 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
401 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; in dataProcessingCommon()
409 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
416 Wd = Rd; in dataProcessing()
456 *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, cc); in dataProcessing()
464 int s, int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument
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DArm64Assembler.h99 int Rd, int Rn,
102 int Rd, int Rm, int Rs, int Rn);
104 int Rd, int Rm, int Rs);
123 virtual void ADDR_LDR(int cc, int Rd,
125 virtual void ADDR_ADD(int cc, int s, int Rd,
127 virtual void ADDR_SUB(int cc, int s, int Rd,
129 virtual void ADDR_STR (int cc, int Rd,
132 virtual void LDR (int cc, int Rd,
134 virtual void LDRB(int cc, int Rd,
136 virtual void STR (int cc, int Rd,
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DARMAssemblerProxy.h80 int Rd, int Rn,
83 int Rd, int Rm, int Rs, int Rn);
85 int Rd, int Rm, int Rs);
104 virtual void LDR (int cc, int Rd,
106 virtual void LDRB(int cc, int Rd,
108 virtual void STR (int cc, int Rd,
110 virtual void STRB(int cc, int Rd,
112 virtual void LDRH (int cc, int Rd,
114 virtual void LDRSB(int cc, int Rd,
116 virtual void LDRSH(int cc, int Rd,
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DMIPSAssembler.cpp355 void ArmToMipsAssembler::protectConditionalOperands(int Rd) in protectConditionalOperands() argument
357 if (Rd == cond.r1) { in protectConditionalOperands()
361 if (cond.type == CMP_COND && Rd == cond.r2) { in protectConditionalOperands()
418 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
424 protectConditionalOperands(Rd); in dataProcessing()
435 mMips->AND(Rd, Rn, src); in dataProcessing()
437 mMips->ANDI(Rd, Rn, src); in dataProcessing()
444 mMips->ADDU(Rd, Rn, src); in dataProcessing()
446 mMips->ADDIU(Rd, Rn, src); in dataProcessing()
453 mMips->SUBU(Rd, Rn, src); in dataProcessing()
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DMIPSAssembler.h91 int Rd, int Rn,
94 int Rd, int Rm, int Rs, int Rn);
96 int Rd, int Rm, int Rs);
115 virtual void LDR (int cc, int Rd,
117 virtual void LDRB(int cc, int Rd,
119 virtual void STR (int cc, int Rd,
121 virtual void STRB(int cc, int Rd,
123 virtual void LDRH (int cc, int Rd,
125 virtual void LDRSB(int cc, int Rd,
127 virtual void LDRSH(int cc, int Rd,
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DARMAssembler.cpp217 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
219 *mPC++ = (cc<<28) | (opcode<<21) | (s<<20) | (Rn<<16) | (Rd<<12) | Op2; in dataProcessing()
229 int Rd, int Rm, int Rs, int Rn) { in MLA() argument
230 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA()
231 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA()
233 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm; in MLA()
236 int Rd, int Rm, int Rs) { in MUL() argument
237 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL()
238 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL()
239 *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm; in MUL()
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DARMAssembler.h91 int Rd, int Rn,
94 int Rd, int Rm, int Rs, int Rn);
96 int Rd, int Rm, int Rs);
115 virtual void LDR (int cc, int Rd,
117 virtual void LDRB(int cc, int Rd,
119 virtual void STR (int cc, int Rd,
121 virtual void STRB(int cc, int Rd,
123 virtual void LDRH (int cc, int Rd,
125 virtual void LDRSB(int cc, int Rd,
127 virtual void LDRSH(int cc, int Rd,
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DARMAssemblerInterface.cpp68 void ARMAssemblerInterface::ADDR_LDR(int cc, int Rd, in ADDR_LDR() argument
71 LDR(cc, Rd, Rn, offset); in ADDR_LDR()
73 void ARMAssemblerInterface::ADDR_STR(int cc, int Rd, in ADDR_STR() argument
76 STR(cc, Rd, Rn, offset); in ADDR_STR()
79 int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument
81 dataProcessing(opADD, cc, s, Rd, Rn, Op2); in ADDR_ADD()
84 int Rd, int Rn, uint32_t Op2) in ADDR_SUB() argument
86 dataProcessing(opSUB, cc, s, Rd, Rn, Op2); in ADDR_SUB()
/system/core/libpixelflinger/tests/arch-arm64/assembler/
Darm64_assembler_test.cpp414 void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0, in dataOpTest() argument
428 regs[Rd] = test.RdValue; in dataOpTest()
450 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
451 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
452 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
453 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
454 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
455 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
456 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break; in dataOpTest()
457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; in dataOpTest()
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