/art/runtime/arch/mips/ |
D | asm_support_mips.S | 75 .macro LDu feven,fodd,disp,base,temp 76 l.s \feven, \disp(\base) 77 lw \temp, \disp+4(\base) 83 .macro SDu feven,fodd,disp,base,temp 85 s.s \feven, \disp(\base) 86 sw \temp, \disp+4(\base) 101 .macro LDu feven,fodd,disp,base,temp 102 l.s \feven, \disp(\base) 103 l.s \fodd, \disp+4(\base) 106 .macro SDu feven,fodd,disp,base,temp [all …]
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/art/compiler/utils/x86/ |
D | assembler_x86.h | 104 void SetDisp8(int8_t disp) { in SetDisp8() argument 106 encoding_[length_++] = static_cast<uint8_t>(disp); in SetDisp8() 109 void SetDisp32(int32_t disp) { in SetDisp32() argument 111 int disp_size = sizeof(disp); in SetDisp32() 112 memmove(&encoding_[length_], &disp, disp_size); in SetDisp32() 135 Address(Register base_in, int32_t disp) { in Address() argument 136 Init(base_in, disp); in Address() 139 Address(Register base_in, Offset disp) { in Address() argument 140 Init(base_in, disp.Int32Value()); in Address() 143 Address(Register base_in, FrameOffset disp) { in Address() argument [all …]
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/art/compiler/linker/arm64/ |
D | relative_patcher_arm64_test.cc | 159 uint32_t disp = target_offset - (adrp_offset & ~0xfffu); in GenNopsAndAdrpLdr() local 160 DCHECK_EQ(disp & 3u, 0u); in GenNopsAndAdrpLdr() 162 ((disp & 0xfffu) << (10 - 2)); // imm12 = ((disp & 0xfffu) >> 2) is at bit 10. in GenNopsAndAdrpLdr() 164 ((disp & 0x3000u) << (29 - 12)) | // immlo = ((disp & 0x3000u) >> 12) is at bit 29, in GenNopsAndAdrpLdr() 165 ((disp & 0xffffc000) >> (14 - 5)) | // immhi = (disp >> 14) is at bit 5, in GenNopsAndAdrpLdr() 167 ((disp & 0x80000000) >> (31 - 23)); // sign bit in immhi is at bit 23. in GenNopsAndAdrpLdr() 549 #define LDRW_PCREL_TEST(adrp_offset, disp) \ argument 550 TEST_F(Arm64RelativePatcherTestDefault, DexCacheReference ## adrp_offset ## WPcRel ## disp) { \ 551 TestAdrpLdrPcRelLdr(kLdrWPcRelInsn, disp, adrp_offset, false, 0x12345678u, 0x1234u); \ 557 #define LDRX_PCREL_TEST(adrp_offset, disp) \ argument [all …]
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D | relative_patcher_arm64.cc | 160 uint32_t disp = target_offset - ((patch_offset - literal_offset + pc_insn_offset) & ~0xfffu); in PatchDexCacheReference() local 194 insn = PatchAdrp(insn, disp); in PatchDexCacheReference() 222 uint32_t imm12 = (disp & 0xfffu) >> shift; in PatchDexCacheReference() 243 uint32_t Arm64RelativePatcher::PatchAdrp(uint32_t adrp, uint32_t disp) { in PatchAdrp() argument 246 ((disp & 0x00003000u) << (29 - 12)) | in PatchAdrp() 248 ((disp & 0xffffc000u) >> (12 + 2 - 5)) | in PatchAdrp() 254 ((disp & 0x80000000u) >> (31 - 23)); in PatchAdrp()
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D | relative_patcher_arm64.h | 42 static uint32_t PatchAdrp(uint32_t adrp, uint32_t disp);
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.h | 132 void SetDisp8(int8_t disp) { in SetDisp8() argument 134 encoding_[length_++] = static_cast<uint8_t>(disp); in SetDisp8() 137 void SetDisp32(int32_t disp) { in SetDisp32() argument 139 int disp_size = sizeof(disp); in SetDisp32() 140 memmove(&encoding_[length_], &disp, disp_size); in SetDisp32() 169 Address(CpuRegister base_in, int32_t disp) { in Address() argument 170 Init(base_in, disp); in Address() 173 Address(CpuRegister base_in, Offset disp) { in Address() argument 174 Init(base_in, disp.Int32Value()); in Address() 177 Address(CpuRegister base_in, FrameOffset disp) { in Address() argument [all …]
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/art/compiler/dex/quick/x86/ |
D | assemble_x86.cc | 876 static uint8_t ModrmForDisp(int base, int disp) { in ModrmForDisp() argument 878 if (disp == 0 && RegStorage::RegNum(base) != rs_rBP.GetRegNum()) { in ModrmForDisp() 880 } else if (IS_SIMM8(disp)) { in ModrmForDisp() 999 void X86Mir2Lir::EmitDisp(uint8_t base, int32_t disp) { in EmitDisp() argument 1001 if (disp == 0 && RegStorage::RegNum(base) != rs_rBP.GetRegNum()) { in EmitDisp() 1003 } else if (IS_SIMM8(disp)) { in EmitDisp() 1004 code_buffer_.push_back(disp & 0xFF); in EmitDisp() 1006 code_buffer_.push_back(disp & 0xFF); in EmitDisp() 1007 code_buffer_.push_back((disp >> 8) & 0xFF); in EmitDisp() 1008 code_buffer_.push_back((disp >> 16) & 0xFF); in EmitDisp() [all …]
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D | codegen_x86.h | 302 LIR* OpMem(OpKind op, RegStorage r_base, int disp) OVERRIDE; 446 void EmitDisp(uint8_t base, int32_t disp); 448 void EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp); 450 int32_t disp); 455 void EmitOpMem(const X86EncodingMap* entry, int32_t raw_base, int32_t disp); 457 int32_t disp); 458 void EmitMemReg(const X86EncodingMap* entry, int32_t raw_base, int32_t disp, int32_t raw_reg); 459 void EmitRegMem(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base, int32_t disp); 461 int32_t raw_index, int scale, int32_t disp); 463 int32_t disp, int32_t raw_reg); [all …]
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D | utility_x86.cc | 556 LIR* X86Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem() argument 564 return NewLIR2(opcode, r_base.GetReg(), disp); in OpMem()
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/art/compiler/dex/quick/ |
D | codegen_util.cc | 569 int disp = boundary_lir->offset - bx_offset; in InstallSwitchTables() local 571 Push32(&code_buffer_, disp); in InstallSwitchTables() 575 << std::hex << disp; in InstallSwitchTables() 594 int disp = boundary_lir->offset - bx_offset; in InstallSwitchTables() local 595 Push32(&code_buffer_, disp); in InstallSwitchTables() 598 << std::hex << disp; in InstallSwitchTables()
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D | gen_invoke.cc | 623 int32_t disp; in NextInvokeInsnSP() local 625 disp = GetThreadOffset<8>(trampoline).Int32Value(); in NextInvokeInsnSP() 627 disp = GetThreadOffset<4>(trampoline).Int32Value(); in NextInvokeInsnSP() 629 cg->LoadWordDisp(cg->TargetPtrReg(kSelf), disp, cg->TargetPtrReg(kInvokeTgt)); in NextInvokeInsnSP()
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D | mir_to_lir.h | 1414 virtual LIR* OpMem(OpKind op, RegStorage r_base, int disp) = 0;
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/art/compiler/dex/quick/mips/ |
D | utility_mips.cc | 1034 LIR* MipsMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem() argument 1035 UNUSED(op, r_base, disp); in OpMem()
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D | codegen_mips.h | 203 LIR* OpMem(OpKind op, RegStorage r_base, int disp);
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/art/compiler/dex/quick/arm/ |
D | assemble_arm.cc | 1512 int32_t disp = target_disp - ((lir->offset + 4) & ~3); in AssembleLIR() local 1513 if (disp < 4096) { in AssembleLIR() 1514 lir->operands[1] = disp; in AssembleLIR()
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D | codegen_arm.h | 206 LIR* OpMem(OpKind op, RegStorage r_base, int disp);
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D | utility_arm.cc | 1246 LIR* ArmMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem() argument 1247 UNUSED(op, r_base, disp); in OpMem()
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/art/compiler/dex/quick/arm64/ |
D | utility_arm64.cc | 1390 LIR* Arm64Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) { in OpMem() argument 1391 UNUSED(op, r_base, disp); in OpMem()
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D | codegen_arm64.h | 209 LIR* OpMem(OpKind op, RegStorage r_base, int disp) OVERRIDE;
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/art/runtime/interpreter/ |
D | interpreter_goto_table_impl.cc | 37 int32_t disp = static_cast<int32_t>(_offset); \ 38 inst = inst->RelativeAt(disp); \ 39 dex_pc = static_cast<uint32_t>(static_cast<int32_t>(dex_pc) + disp); \
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