Home
last modified time | relevance | path

Searched refs:right_op (Results 1 – 9 of 9) sorted by relevance

/art/compiler/dex/quick/arm64/
Dint_arm64.cc113 RegStorage right_op = RegStorage::InvalidReg(); // The operands. in GenSelect() local
126 right_op = zero_reg; in GenSelect()
129 right_op = zero_reg; in GenSelect()
132 right_op = left_op; in GenSelect()
135 right_op = left_op; in GenSelect()
138 right_op = left_op; in GenSelect()
142 right_op = rs_dest; in GenSelect()
164 right_op = t_reg2; in GenSelect()
170 if (!right_op.Valid()) { in GenSelect()
172 right_op = t_reg2; in GenSelect()
[all …]
Dcodegen_arm64.h181 void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
/art/compiler/dex/quick/x86/
Dint_x86.cc212 void X86Mir2Lir::GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code, in GenSelectConst32() argument
215 DCHECK(!left_op.IsPair() && !right_op.IsPair() && !rs_dest.IsPair()); in GenSelectConst32()
216 DCHECK(!left_op.IsFloat() && !right_op.IsFloat() && !rs_dest.IsFloat()); in GenSelectConst32()
225 const bool dest_intersect = IsSameReg(rs_dest, left_op) || IsSameReg(rs_dest, right_op); in GenSelectConst32()
232 OpRegReg(kOpCmp, left_op, right_op); in GenSelectConst32()
252 OpRegReg(kOpCmp, left_op, right_op); in GenSelectConst32()
261 LIR* cmp_branch = OpCmpBranch(code, left_op, right_op, nullptr); in GenSelectConst32()
Dcodegen_x86.h271 void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
/art/compiler/dex/quick/mips/
Dint_mips.cc280 void MipsMir2Lir::GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code, in GenSelectConst32() argument
287 LIR* ne_branchover = OpCmpBranch(code, left_op, right_op, nullptr); in GenSelectConst32()
Dcodegen_mips.h181 void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
/art/compiler/dex/quick/arm/
Dcodegen_arm.h180 void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
Dint_arm.cc217 void ArmMir2Lir::GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code, in GenSelectConst32() argument
227 OpRegRegReg(kOpSub, rs_dest, left_op, right_op); in GenSelectConst32()
235 OpRegReg(kOpCmp, left_op, right_op); // Same? in GenSelectConst32()
/art/compiler/dex/quick/
Dmir_to_lir.h1363 virtual void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,