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Searched refs:Iend_LE (Results 1 – 20 of 20) sorted by relevance

/external/valgrind/VEX/priv/
Dguest_tilegx_toIR.c134 load1 = IRExpr_Load(Iend_LE, ty, addr); in load()
158 stmt(IRStmt_Store(Iend_LE, addr, data)); in store()
369 vex_inject_ir(irsb, Iend_LE); in disInstr_TILEGX_WRK()
767 stmt( IRStmt_CAS(mkIRCAS(IRTemp_INVALID, t2, Iend_LE, in disInstr_TILEGX_WRK()
781 stmt( IRStmt_CAS(mkIRCAS(IRTemp_INVALID, t3, Iend_LE, in disInstr_TILEGX_WRK()
914 Iend_LE, in disInstr_TILEGX_WRK()
928 Iend_LE, in disInstr_TILEGX_WRK()
960 Iend_LE, in disInstr_TILEGX_WRK()
975 Iend_LE, in disInstr_TILEGX_WRK()
992 Iend_LE, in disInstr_TILEGX_WRK()
[all …]
Dir_defs.c1328 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); in ppIRExpr()
1432 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); in ppIRCAS()
1463 vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be"); in ppIRStoreG()
1491 vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be"); in ppIRLoadG()
1575 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); in ppIRStmt()
1593 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); in ppIRStmt()
1599 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); in ppIRStmt()
1857 vassert(end == Iend_LE || end == Iend_BE); in IRExpr_Load()
2114 vassert(end == Iend_LE || end == Iend_BE); in IRStmt_Store()
2122 vassert(end == Iend_LE || end == Iend_BE); in IRStmt_StoreG()
[all …]
Dhost_x86_isel.c871 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1179 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1193 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1207 IRExpr_Load(Iend_LE,Ity_I16,bind(0))) ); in iselIntExpr_R_wrk()
1669 && e->Iex.Load.end == Iend_LE) { in iselIntExpr_RMI_wrk()
2121 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselInt64Expr_wrk()
2895 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
3038 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
3297 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselVecExpr_wrk()
3318 IRExpr_Load(Iend_LE,Ity_I64,bind(0)))); in iselVecExpr_wrk()
[all …]
Dhost_ppc_isel.c2116 if (IEndianess == Iend_LE) in iselWordExpr_R_wrk()
2148 if (IEndianess == Iend_LE) { in iselWordExpr_R_wrk()
2262 if (IEndianess == Iend_LE) { in iselWordExpr_R_wrk()
2299 if (IEndianess == Iend_LE) { in iselWordExpr_R_wrk()
3675 if (IEndianess == Iend_LE) { in iselInt64Expr_wrk()
3723 if (IEndianess == Iend_LE) { in iselInt64Expr_wrk()
4903 if (IEndianess == Iend_LE) in iselVecExpr_wrk()
4920 if (IEndianess == Iend_LE) in iselVecExpr_wrk()
5015 if (IEndianess == Iend_LE) in iselVecExpr_wrk()
5023 if (IEndianess == Iend_LE) in iselVecExpr_wrk()
[all …]
Dhost_amd64_isel.c942 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1396 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1409 IRExpr_Load(Iend_LE,Ity_I16,bind(0))) ); in iselIntExpr_R_wrk()
2079 && e->Iex.Load.end == Iend_LE) { in iselIntExpr_RMI_wrk()
2574 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
2789 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
3145 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselVecExpr_wrk()
4296 if (lg->end != Iend_LE) in iselStmt()
4322 if (sg->end != Iend_LE) in iselStmt()
4347 if (tya != Ity_I64 || end != Iend_LE) in iselStmt()
Dhost_arm_isel.c1202 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1962 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselInt64Expr_wrk()
2208 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselNeon64Expr_wrk()
5410 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
5567 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
5699 if (tya != Ity_I32 || end != Iend_LE) in iselStmt()
5768 if (tya != Ity_I32 || end != Iend_LE) in iselStmt()
5803 if (tya != Ity_I32 || end != Iend_LE) in iselStmt()
Dhost_arm64_isel.c1459 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
3024 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
3211 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
3531 if (tya != Ity_I64 || end != Iend_LE) in iselStmt()
Dguest_arm_toIR.c315 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
331 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
340 stmt( IRStmt_StoreG(Iend_LE, addr, data, in storeGuardedLE()
372 stmt( IRStmt_LoadG(Iend_LE, cvt, dst, addr, alt, in loadGuardedLE()
14693 vex_inject_ir(irsb, Iend_LE); in disInstr_ARM_WRK()
16066 stmt( IRStmt_LLSC(Iend_LE, tOld, mkexpr(tRn), in disInstr_ARM_WRK()
16068 stmt( IRStmt_LLSC(Iend_LE, tSC1, mkexpr(tRn), in disInstr_ARM_WRK()
16073 stmt( IRStmt_LLSC(Iend_LE, tOld, mkexpr(tRn), in disInstr_ARM_WRK()
16075 stmt( IRStmt_LLSC(Iend_LE, tSC1, mkexpr(tRn), in disInstr_ARM_WRK()
16130 stmt( IRStmt_LLSC(Iend_LE, res, getIRegA(rN), in disInstr_ARM_WRK()
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Dhost_tilegx_isel.c467 if (e->Iex.Load.end != Iend_LE in iselWordExpr_R_wrk()
Dguest_mips_toIR.c904 load1 = IRExpr_Load(Iend_LE, ty, addr); in load()
925 stmt(IRStmt_Store(Iend_LE, addr, data)); in store()
2200 Iend_LE, mkexpr(op1addr), in mips_irgen_load_and_add32()
2223 Iend_LE, mkexpr(op1addr), in mips_irgen_load_and_add64()
12135 vex_inject_ir(irsb, Iend_LE); in disInstr_MIPS_WRK()
17032 stmt(IRStmt_LLSC(Iend_LE, t2, mkexpr(t1), NULL /* this is a load */ )); in disInstr_MIPS_WRK()
17049 (Iend_LE, t2, mkexpr(t1), NULL /* this is a load */ )); in disInstr_MIPS_WRK()
17064 stmt(IRStmt_LLSC(Iend_LE, t2, mkexpr(t1), mkNarrowTo32(ty, getIReg(rt)))); in disInstr_MIPS_WRK()
17078 stmt(IRStmt_LLSC(Iend_LE, t2, mkexpr(t1), getIReg(rt))); in disInstr_MIPS_WRK()
Dguest_x86_toIR.c640 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
702 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
762 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, in casLE()
6709 mkIRCAS( IRTemp_INVALID, dest, Iend_LE, mkexpr(addr), in dis_cmpxchg_G_E()
8173 vex_inject_ir(irsb, Iend_LE); in disInstr_X86_WRK()
14777 Iend_LE, mkexpr(addr), in disInstr_X86_WRK()
Dguest_arm64_toIR.c292 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
308 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
6331 stmt(IRStmt_LLSC(Iend_LE, res, mkexpr(ea), NULL/*LL*/)); in dis_ARM64_load_store()
6346 stmt(IRStmt_LLSC(Iend_LE, res, mkexpr(ea), data)); in dis_ARM64_load_store()
13893 vex_inject_ir(irsb, Iend_LE); in disInstr_ARM64_WRK()
Dguest_amd64_toIR.c299 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
304 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
1615 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, in casLE()
8408 mkIRCAS( IRTemp_INVALID, dest, Iend_LE, mkexpr(addr), in dis_cmpxchg_G_E()
21762 Iend_LE, mkexpr(addr), in dis_ESC_0F()
27305 Iend_LE, laneIs32 ? ILGop_Ident32 : ILGop_Ident64, in dis_VMASKMOV()
27311 stmt( IRStmt_StoreG(Iend_LE, ea, mkexpr(data), mkexpr(cond)) ); in dis_VMASKMOV()
31347 vex_inject_ir(irsb, Iend_LE);
Dguest_ppc_toIR.c592 stmt( IRStmt_Store(Iend_LE, addr, data) ); in store()
653 return IRExpr_Load(Iend_LE, ty, addr); in load()
662 return IRStmt_LLSC(Iend_LE, result, addr, storedata); in stmt_load()
19014 vex_inject_ir(irsb, Iend_LE); in disInstr_PPC_WRK()
Dhost_mips_isel.c812 if (e->Iex.Load.end != Iend_LE in iselWordExpr_R_wrk()
/external/valgrind/memcheck/
Dmc_translate.c4625 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load_WRK()
4639 if (end == Iend_LE) { in expr2vbits_Load_WRK()
4759 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load()
5029 tl_assert( end == Iend_LE || end == Iend_BE ); in do_shadow_Store()
5075 if (end == Iend_LE) { in do_shadow_Store()
5127 if (end == Iend_LE) { in do_shadow_Store()
5194 if (end == Iend_LE) { in do_shadow_Store()
5292 end = Iend_LE; in do_shadow_Dirty()
5898 if (cas->end == Iend_LE) { in do_shadow_CAS_double()
/external/valgrind/VEX/pub/
Dlibvex_ir.h256 Iend_LE=0x1200, /* little endian */ enumerator
/external/valgrind/exp-dhat/
Ddh_main.c777 # define END Iend_LE in add_counter_update()
/external/valgrind/massif/
Dms_main.c2019 # define END Iend_LE in add_counter_update()
/external/valgrind/callgrind/
Dmain.c832 # define CLGEndness Iend_LE