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Searched refs:JR (Results 1 – 25 of 40) sorted by relevance

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/external/valgrind/none/tests/mips64/
Dbranch_and_jump_instructions.stdout.exp259 B BAL JR :: 0x6, RSval: 0x0
260 B BAL JR :: 0x6, RSval: 0x0
261 B BAL JR :: 0x9823b74, RSval: 0x9823b6e
262 B BAL JR :: 0xd4326df, RSval: 0xd4326d9
263 B BAL JR :: 0x130476e2, RSval: 0x130476dc
264 B BAL JR :: 0x17c56b71, RSval: 0x17c56b6b
265 B BAL JR :: 0x1a864db8, RSval: 0x1a864db2
266 B BAL JR :: 0x1e47500b, RSval: 0x1e475005
267 B BAL JR :: 0x2608edbe, RSval: 0x2608edb8
268 B BAL JR :: 0x22c9f015, RSval: 0x22c9f00f
[all …]
Dbranches.stdout.exp52 B BAL JR :: 6, RSval: 0
53 B BAL JR :: 7, RSval: 1
54 B BAL JR :: 8, RSval: 2
55 B BAL JR :: 9, RSval: 3
56 B BAL JR :: 10, RSval: 4
57 B BAL JR :: 11, RSval: 5
58 B BAL JR :: 12, RSval: 6
59 B BAL JR :: 13, RSval: 7
60 B BAL JR :: 14, RSval: 8
61 B BAL JR :: 15, RSval: 9
[all …]
/external/valgrind/none/tests/mips32/
Dbranches.stdout.exp52 B BAL JR :: 6, RSval: 0
53 B BAL JR :: 7, RSval: 1
54 B BAL JR :: 8, RSval: 2
55 B BAL JR :: 9, RSval: 3
56 B BAL JR :: 10, RSval: 4
57 B BAL JR :: 11, RSval: 5
58 B BAL JR :: 12, RSval: 6
59 B BAL JR :: 13, RSval: 7
60 B BAL JR :: 14, RSval: 8
61 B BAL JR :: 15, RSval: 9
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dret.ll25 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
35 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
45 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
55 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
65 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
75 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
85 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
96 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
111 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
127 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
[all …]
Dindirectbr.ll17 ; NOT-R6: jr $4 # <MCInst #{{[0-9]+}} JR
21 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
26 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
/external/v8/src/mips/
Dconstants-mips.cc158 case JR: in IsForbiddenInBranchDelay()
221 case JR: in InstructionType()
Dassembler-mips.cc540 ((function_field == JALR) || (rd_field == 0 && (function_field == JR)))); in IsJump()
558 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR; in IsJr()
1411 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); in jr()
2682 *(p + 2) = SPECIAL | rs_field | JR; in set_target_address_at()
2721 *(p + 2) = SPECIAL | rs_field | JR; in JumpLabelToJumpRegister()
Dconstants-mips.h380 JR = ((1 << 3) + 0), enumerator
/external/v8/src/mips64/
Dconstants-mips64.cc158 case JR: in IsForbiddenInBranchDelay()
221 case JR: in InstructionType()
Dconstants-mips64.h357 JR = ((1 << 3) + 0), enumerator
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-GB/
Den-GB_kh0_kpdf_dur.pkb5 a$��r����B3���0��� �A������JR��A�PQ2���!�r!Q@�#��� ��u���� �3��B����]���������…
6 …������ �0� �%3P��)�����Û� ��R0��������������������� ����JR����Ź�a1���!�2�!…
Den-GB_kh0_kdt_lfz1.pkb24 ��: � �L���!�G H9�'���B4AϑDd\€�DU�����?�lq� z�ۉ�� C���'`ۉ��?F(�F<*�dgH\]$R�Î@���JR�@�cR`…
/external/llvm/test/CodeGen/Mips/
Deh-return32.ll46 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
86 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
Deh-return64.ll47 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
89 ; NOT-R6: jr $ra # <MCInst #{{[0-9]+}} JR
/external/llvm/test/MC/Disassembler/Hexagon/
Djr.txt2 # Hexagon Programmer's Reference Manual 11.3 JR
/external/llvm/lib/Target/Hexagon/
DHexagonScheduleV4.td21 // | SLOT2 | XTYPE ALU32 J JR |
130 // JR
DHexagonInstrInfoV3.td76 // JR +
85 // JR -
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/it-IT/
Dit-IT_cm0_kdt_lfz2.pkb39 …��m��d���������ð��p��0�cgh�����S&��r\��%��8�Ҵ�UwP�KZyR6 nw�°�H&�k���5�ăJR��r|�<g�q�������'lP�…
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/
Dfr-FR_nk0_kdt_mgc2.pkb44 �%�e��E������4����(�:��l!wt]80B>mx(�;��JR�6P��2<\;�#"���"��5�'���[���Q<Q�I��n89|Ggn…
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/es-ES/
Des-ES_zl0_kpdf_dur.pkb4 …�����0�0A��AP%�Ep�)p�)aR!!�'1s#"a2"Qape0`0q41q%2�43������JR�H��D��5bЛ�ЪҐHqS`@…
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsNaClELFStreamer.cpp57 return MI.getOpcode() == Mips::JR; in isIndirectJump()
/external/llvm/lib/Target/Mips/
DMipsLongBranch.cpp335 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) in expandToLongBranch()
344 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) in expandToLongBranch()
DMipsDelaySlotFiller.cpp617 case Mips::JR: in runOnMachineBasicBlock()
677 (Opcode == Mips::JR || Opcode == Mips::PseudoIndirectBranch || in searchRange()
DMipsAsmPrinter.cpp117 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
1022 EmitInstrReg(*STI, Mips::JR, Mips::S2); in EmitFPCallStub()
/external/pcre/dist/sljit/
DsljitNativeMIPS_common.c143 #define JR (HI(0) | LO(8)) macro
666 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS)); in sljit_emit_return()
1582 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS)); in sljit_emit_fast_return()
1714 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); in sljit_emit_jump()
1861 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); in sljit_emit_cmp()
1943 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); in sljit_emit_fcmp()
2009 FAIL_IF(push_inst(compiler, JR | S(src_r), UNMOVABLE_INS)); in sljit_emit_ijump()

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