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Searched refs:MTC1 (Results 1 – 15 of 15) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp118 Opc = Mips::MTC1; in copyPhysReg()
298 expandCvtFPInt(MBB, MI, Mips::CVT_S_W, Mips::MTC1, false); in expandPostRAPseudo()
301 expandCvtFPInt(MBB, MI, Mips::CVT_D32_W, Mips::MTC1, false); in expandPostRAPseudo()
307 expandCvtFPInt(MBB, MI, Mips::CVT_D64_W, Mips::MTC1, true); in expandPostRAPseudo()
556 const MCInstrDesc& Mtc1Tdd = get(Mips::MTC1); in expandBuildPairF64()
DMipsInstrFPU.td363 def MTC1 : MMRel, MTC1_FT<"mtc1", FGR32Opnd, GPR32Opnd, II_MTC1,
590 def : MipsPat<(f32 fpimm0), (MTC1 ZERO)>;
591 def : MipsPat<(f32 fpimm0neg), (FNEG_S (MTC1 ZERO))>;
DMipsAsmPrinter.cpp797 if (Opcode == Mips::MTC1) { in EmitInstrRegReg()
836 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1; in EmitSwapFPIntParams()
DMipsFastISel.cpp301 emitInst(Mips::MTC1, DestReg).addReg(TempReg); in materializeFP()
/external/v8/src/mips64/
Dconstants-mips64.h461 MTC1 = ((0 << 3) + 4) << 21, enumerator
Ddisasm-mips64.cc490 case MTC1: in DecodeTypeRegister()
Dsimulator-mips64.cc1972 case MTC1: in ConfigureTypeRegister()
2330 case MTC1: in DecodeTypeRegister()
Dassembler-mips64.cc2227 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1()
/external/v8/src/mips/
Dconstants-mips.h449 MTC1 = ((0 << 3) + 4) << 21, enumerator
Ddisasm-mips.cc465 case MTC1: in DecodeTypeRegister()
Dsimulator-mips.cc1902 case MTC1: in ConfigureTypeRegister()
2195 case MTC1: in DecodeTypeRegister()
Dassembler-mips.cc2011 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1()
/external/pcre/dist/sljit/
DsljitNativeMIPS_common.c151 #define MTC1 (HI(17) | (4 << 21)) macro
1351 FAIL_IF(push_inst(compiler, MTC1 | flags | T(src) | FS(TMP_FREG1), MOVABLE_INS)); in sljit_emit_fop1_convd_fromw()
1362 FAIL_IF(push_inst(compiler, MTC1 | flags | T(TMP_REG1) | FS(TMP_FREG1), MOVABLE_INS)); in sljit_emit_fop1_convd_fromw()
/external/valgrind/none/tests/mips32/
DMoveIns.stdout.exp-BE29 MTC1
DMoveIns.stdout.exp29 MTC1