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Searched refs:Miss (Results 1 – 2 of 2) sorted by relevance

/external/valgrind/callgrind/
Dsim.c133 typedef enum { Hit = 0, Miss, MissDirty } CacheResult; enumerator
279 return Miss; in cachesim_setref()
305 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit; in cachesim_ref()
388 return (tmp_tag & CACHELINE_DIRTY) ? MissDirty : Miss; in cachesim_setref_wb()
413 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit; in cachesim_ref_wb()
429 case Miss: return MemAccess; in cachesim_I1_Read()
441 case Miss: return MemAccess; in cachesim_D1_Read()
460 case Miss: return MemAccess; in cachesim_D1_Write()
558 case Miss: return MemAccess; in prefetch_I1_Read()
571 case Miss: return MemAccess; in prefetch_D1_Read()
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/external/guava/guava-tests/test/com/google/common/io/testdata/
Dalice_in_wonderland.txt768 would happen: `"Miss Alice! Come here directly, and get ready
2067 low voice, `Why the fact is, you see, Miss, this here ought to
2070 cut off, you know. So you see, Miss, we're doing our best, afore