Home
last modified time | relevance | path

Searched refs:VAL (Results 1 – 25 of 65) sorted by relevance

123

/external/llvm/test/CodeGen/R600/
Dwork-item-intrinsics.ll7 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
8 ; EG: MOV [[VAL]], KC0[0].X
10 ; GCN: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0
11 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
21 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
22 ; EG: MOV [[VAL]], KC0[0].Y
24 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1
25 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
26 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]]
36 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
[all …]
Dimm.ll134 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
135 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0, [[VAL]]{{$}}
144 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
145 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0.5, [[VAL]]{{$}}
154 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
155 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -0.5, [[VAL]]{{$}}
164 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
165 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1.0, [[VAL]]{{$}}
174 ; CHECK: s_load_dword [[VAL:s[0-9]+]]
175 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1.0, [[VAL]]{{$}}
[all …]
Dextload.ll6 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+.[XYZW]]],
7 ; EG: VTX_READ_32 [[VAL]]
19 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+.[XYZW]]],
20 ; EG: VTX_READ_32 [[VAL]]
32 ; EG: LDS_READ_RET {{.*}}, [[VAL:T[0-9]+.[XYZW]]]
33 ; EG: LDS_WRITE * [[VAL]]
44 ; EG: LDS_READ_RET {{.*}}, [[VAL:T[0-9]+.[XYZW]]]
45 ; EG: LDS_WRITE * [[VAL]]
Dctpop.ll27 ; GCN: buffer_load_dword [[VAL:v[0-9]+]],
28 ; GCN: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 0
176 ; GCN: buffer_load_dword [[VAL:v[0-9]+]],
177 ; GCN: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 4
191 ; GCN: buffer_load_dword [[VAL:v[0-9]+]],
192 ; GCN: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 4
206 ; GCN: buffer_load_dword [[VAL:v[0-9]+]],
208 ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL]], [[LIT]]
209 ; VI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], [[LIT]]
221 ; GCN-DAG: buffer_load_dword [[VAL:v[0-9]+]],
[all …]
Dllvm.AMDGPU.flbit.i32.ll7 ; SI: s_load_dword [[VAL:s[0-9]+]],
8 ; SI: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]]
19 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
20 ; SI: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]]
Dllvm.AMDGPU.brev.ll7 ; SI: s_load_dword [[VAL:s[0-9]+]],
8 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
19 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
20 ; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]]
Dfp16_to_fp.ll8 ; SI: buffer_load_ushort [[VAL:v[0-9]+]]
9 ; SI: v_cvt_f32_f16_e32 [[RESULT:v[0-9]+]], [[VAL]]
20 ; SI: buffer_load_ushort [[VAL:v[0-9]+]]
21 ; SI: v_cvt_f32_f16_e32 [[RESULT32:v[0-9]+]], [[VAL]]
Dcttz_zero_undef.ll10 ; SI: s_load_dword [[VAL:s[0-9]+]],
11 ; SI: s_ff1_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
24 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
25 ; SI: v_ffbl_b32_e32 [[RESULT:v[0-9]+]], [[VAL]]
Dctlz_zero_undef.ll10 ; SI: s_load_dword [[VAL:s[0-9]+]],
11 ; SI: s_flbit_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
24 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
25 ; SI: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]]
Dbswap.ll13 ; SI: buffer_load_dword [[VAL:v[0-9]+]]
14 ; SI-DAG: v_alignbit_b32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8
15 ; SI-DAG: v_alignbit_b32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24
Dfp32_to_fp16.ll7 ; SI: buffer_load_dword [[VAL:v[0-9]+]]
8 ; SI: v_cvt_f16_f32_e32 [[RESULT:v[0-9]+]], [[VAL]]
Dfp_to_sint.f64.ll35 ; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
36 ; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
40 ; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}}
/external/deqp/data/gles2/shaders/
Dpreprocessor.test155 #define VAL 2.0
156 #undef VAL sdflkjfds
157 #define VAL 1.0
161 ${POSITION_FRAG_COLOR} = vec4(VAL);
2933 #define VAL 4
2935 #if (VAL << 2) == 16
2950 #define VAL 5
2952 #if (VAL >> 1) == 2
2967 #define VAL 5
2969 #if (VAL < 6) && (-VAL < -4)
[all …]
/external/deqp/data/gles3/shaders/
Dpreprocessor.test183 #define VAL 2.0
184 #undef VAL sdflkjfds
185 #define VAL 1.0
190 ${POSITION_FRAG_COLOR} = vec4(VAL);
3545 #define VAL 4
3547 #if (VAL << 2) == 16
3564 #define VAL 5
3566 #if (VAL >> 1) == 2
3583 #define VAL 5
3585 #if (VAL < 6) && (-VAL < -4)
[all …]
/external/llvm/include/llvm/ADT/
DAPInt.h79 uint64_t VAL; ///< Used to store the <= 64 bits integer value. member
148 VAL &= mask; in clearUnusedBits()
157 return isSingleWord() ? VAL : pVal[whichWord(bitPosition)]; in getWord()
237 : BitWidth(numBits), VAL(0) { in BitWidth()
240 VAL = val; in BitWidth()
279 APInt(const APInt &that) : BitWidth(that.BitWidth), VAL(0) { in APInt()
281 VAL = that.VAL; in APInt()
287 APInt(APInt &&that) : BitWidth(that.BitWidth), VAL(that.VAL) { in APInt()
339 return VAL == ~integerPart(0) >> (APINT_BITS_PER_WORD - BitWidth); in isAllOnesValue()
354 return BitWidth == 1 ? VAL == 0 in isMaxSignedValue()
[all …]
/external/valgrind/auxprogs/
Dgsl16test103 rm -f out-VAL
104 …for f in $ALL_TESTS ; do eval $GSL_VV -v --trace-children=yes "$GSL_VFLAGS" ./$f ; done) &> out-VAL
109 echo -n " Valgrind fails: " && (grep FAIL: out-VAL | wc -l)
110 echo -n " Valgrind passes: " && (grep PASS: out-VAL | wc -l)
114 (echo -n " Valgrind fails: " && (grep FAIL: out-VAL | wc -l)) >> summary.txt
115 (echo -n " Valgrind passes: " && (grep PASS: out-VAL | wc -l)) >> summary.txt
/external/llvm/lib/Support/
DAPInt.cpp94 VAL = bigVal[0]; in initFromArray()
108 : BitWidth(numBits), VAL(0) { in APInt()
113 : BitWidth(numBits), VAL(0) { in APInt()
118 : BitWidth(numbits), VAL(0) { in APInt()
138 VAL = 0; in AssignSlowCase()
145 VAL = RHS.VAL; in AssignSlowCase()
157 VAL = RHS; in operator =()
170 ID.AddInteger(VAL); in Profile()
199 ++VAL; in operator ++()
228 --VAL; in operator --()
[all …]
/external/libxml2/os400/
Dmake-rpg.sh33 VAL="`db2_name \"${NAME}\" nomangle`"
36 then VAL=SCHMTYPES
39 echo "s/${VAR}/${VAL}/g" >> tmpsubstfile
40 eval "VAR_${VAR}=\"${VAL}\""
/external/llvm/test/Transforms/InstCombine/
Dsincospi.ll26 ; CHECK-FLOAT-IN-VEC: [[VAL:%[a-z0-9]+]] = load float, float* @var32
27 ; CHECK-FLOAT-IN-VEC: [[SINCOS:%[a-z0-9]+]] = call <2 x float> @__sincospif_stret(float [[VAL]])
31 ; CHECK: [[VAL:%[a-z0-9]+]] = load float, float* @var32
32 ; CHECK: [[SINCOS:%[a-z0-9]+]] = call { float, float } @__sincospif_stret(float [[VAL]])
63 ; CHECK-FLOAT-IN-VEC: [[VAL:%[a-z0-9]+]] = load double, double* @var64
64 …ECK-FLOAT-IN-VEC: [[SINCOS:%[a-z0-9]+]] = call { double, double } @__sincospi_stret(double [[VAL]])
68 ; CHECK: [[VAL:%[a-z0-9]+]] = load double, double* @var64
69 ; CHECK: [[SINCOS:%[a-z0-9]+]] = call { double, double } @__sincospi_stret(double [[VAL]])
/external/clang/test/CodeGenCXX/
Ddebug-info-byval.cpp18 class VAL { class
26 void get(int *i, unsigned dl, VAL v, VAL *p, unsigned n, EVT missing_arg) { in get()
/external/llvm/test/CodeGen/ARM/
D2010-05-18-PostIndexBug.ll11 ; ARM-DAG: mov [[VAL:r[0-9]+]], #0
12 ; ARM: str [[VAL]], [r[[ADDR]]], r0
16 ; THUMB-DAG: movs [[VAL:r[0-9]+]], #0
18 ; THUMB: str [[VAL]], [r[[ADDR]]]
/external/llvm/test/CodeGen/SystemZ/
Dint-move-08.ll94 ; CHECK: l [[VAL:%r[0-5]]], 0([[REG]])
96 ; CHECK: st [[VAL]], 0([[REG]])
108 ; CHECK: llc [[VAL:%r[0-5]]], 0([[REG]])
109 ; CHECK: srl [[VAL]], 1
110 ; CHECK: stc [[VAL]], 1([[REG]])
124 ; CHECK: llhrl [[VAL:%r[0-5]]], garray16
125 ; CHECK: srl [[VAL]], 1
126 ; CHECK: sthrl [[VAL]], garray16+2
/external/clang/test/CodeGenObjC/
Darc-related-result-type.m10 // CHECK: [[VAL:%.*]] = alloca [[TEST0:%.*]]*
16 // CHECK-NEXT: load [[TEST0]]*, [[TEST0]]** [[VAL]],
25 // CHECK-NEXT: [[T0:%.*]] = bitcast [[TEST0]]** [[VAL]] to i8**
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/textana/it-IT/
Dit-IT_tpp_net.utf7820 769 770 VAL 1
7829 778 779 VAL 1
7831 780 781 VAL 4
7833 782 783 VAL 3
7835 784 785 VAL 2
7842 791 792 VAL 4
7844 793 794 VAL 3
7846 795 796 VAL 2
7850 799 800 VAL 1
7859 808 809 VAL 1
[all …]
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/textana/en-US/
Den-US_tpp_net.utf7906 66 67 VAL 2
7908 68 69 VAL 2
8940 1100 1101 VAL 2
8942 1102 1103 VAL 2
8949 1109 1110 VAL 2
8951 1111 1112 VAL 2
8957 1117 1118 VAL 2
8959 1119 1120 VAL 2
8965 1125 1126 VAL 2
8967 1127 1128 VAL 2
[all …]

123