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Searched refs:instr2 (Results 1 – 8 of 8) sorted by relevance

/external/v8/src/arm64/
Dcode-stubs-arm64.h106 Instruction* instr2 = instr1->following(); in GetMode() local
109 DCHECK(instr2->IsPCRelAddressing() && (instr2->Rd() == xzr.code())); in GetMode()
115 if (instr2->IsUncondBranchImm()) { in GetMode()
119 DCHECK(instr2->IsPCRelAddressing()); in GetMode()
136 Instruction* instr2 = patcher.InstructionAt(kInstructionSize); in Patch() local
139 DCHECK(instr2->IsPCRelAddressing() || instr2->IsUncondBranchImm()); in Patch()
142 int32_t offset_to_incremental_compacting = instr2->ImmPCOffset(); in Patch()
/external/v8/src/mips/
Dassembler-mips-inl.h355 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); in IsPatchedReturnSequence() local
358 ((instr2 & kOpcodeMask) == JAL || in IsPatchedReturnSequence()
359 ((instr2 & kOpcodeMask) == SPECIAL && in IsPatchedReturnSequence()
360 (instr2 & kFunctionFieldMask) == JALR))); in IsPatchedReturnSequence()
Dassembler-mips.cc2558 Instr instr2 = instr_at(pc + kInstrSize); in target_address_at() local
2560 if ((GetOpcodeField(instr1) == LUI) && (GetOpcodeField(instr2) == ORI)) { in target_address_at()
2563 (GetImmediate16(instr1) << 16) | GetImmediate16(instr2)); in target_address_at()
2591 Instr instr2 = instr_at(pc + kInstrSize); in set_target_address_at() local
2592 uint32_t rt_code = GetRtField(instr2); in set_target_address_at()
2599 CHECK((GetOpcodeField(instr1) == LUI && GetOpcodeField(instr2) == ORI)); in set_target_address_at()
2648 if (in_range && GetRt(instr2) == GetRs(instr3)) { in set_target_address_at()
2655 if (in_range && !is_ret && GetRt(instr2) == GetRs(instr3)) { in set_target_address_at()
2666 uint32_t rs_field = GetRt(instr2) << kRsShift; in set_target_address_at()
2678 uint32_t rs_field = GetRt(instr2) << kRsShift; in set_target_address_at()
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/external/v8/src/mips64/
Dassembler-mips64-inl.h349 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); // dsll. in IsPatchedReturnSequence() local
355 (instr2 & kFunctionFieldMask) == DSLL && in IsPatchedReturnSequence()
Dassembler-mips64.cc2890 Instr instr2 = instr_at(pc + 1 * kInstrSize); in JumpLabelToJumpRegister() local
2896 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
2898 uint32_t rs_field = GetRt(instr2) << kRsShift; in JumpLabelToJumpRegister()
2904 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
2906 uint32_t rs_field = GetRt(instr2) << kRsShift; in JumpLabelToJumpRegister()
/external/v8/src/arm/
Dassembler-arm.cc3533 Instr instr2 = instr_at(rinfo2.pc()); in CheckConstPool() local
3534 DCHECK(IsVldrDPcImmediateOffset(instr2)); in CheckConstPool()
3535 delta = GetVldrDRegisterImmediateOffset(instr2); in CheckConstPool()
3580 Instr instr2 = instr_at(rinfo2.pc()); in CheckConstPool() local
3581 if (IsLdrPcImmediateOffset(instr2)) { in CheckConstPool()
3582 delta = GetLdrRegisterImmediateOffset(instr2); in CheckConstPool()
/external/llvm/docs/
DMergeFunctions.rst415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123
421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123
434 And instructions with opcode "*instr2*" are equal, because their opcodes and
/external/icu/icu4c/source/test/intltest/
Dregextst.cpp806 UnicodeString instr2 = "not abc"; in API_Match() local
817 m1->reset(instr2); in API_Match()
819 REGEX_ASSERT(m1->input() == instr2); in API_Match()
861 m1->reset(instr2); in API_Match()
902 m1->reset(instr2); // "not abc" in API_Match()