| /external/valgrind/VEX/priv/ |
| D | host_generic_reg_alloc2.c | 119 HReg vreg; member
181 if (HRegUsage__contains(®_usages_in[m], state[k].vreg)) in findMostDistantlyMentionedVReg()
195 static void sanity_check_spill_offset ( VRegLR* vreg ) in sanity_check_spill_offset() argument
197 switch (vreg->reg_class) { in sanity_check_spill_offset()
199 vassert(0 == ((UShort)vreg->spill_offset % 16)); break; in sanity_check_spill_offset()
201 vassert(0 == ((UShort)vreg->spill_offset % 8)); break; in sanity_check_spill_offset()
483 (*ppReg)(rreg_state[z].vreg); \ in doRegisterAllocation()
523 rreg_state[j].vreg = INVALID_HREG; in doRegisterAllocation()
604 HReg vreg = reg_usage_arr[ii].vRegs[j]; in doRegisterAllocation() local
605 vassert(hregIsVirtual(vreg)); in doRegisterAllocation()
[all …]
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| /external/v8/test/cctest/compiler/ |
| D | instruction-selector-tester.h | 87 for (int vreg = 0; vreg < sequence.VirtualRegisterCount(); ++vreg) { variable
88 if (sequence.IsDouble(vreg)) {
89 CHECK(!sequence.IsReference(vreg));
90 doubles.insert(vreg);
92 if (sequence.IsReference(vreg)) {
93 CHECK(!sequence.IsDouble(vreg));
94 references.insert(vreg);
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| D | test-instruction.cc | 90 UnallocatedOperand* NewUnallocated(int vreg) { in NewUnallocated() argument
93 unallocated->set_virtual_register(vreg); in NewUnallocated()
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 669 (lane_size_in_bytes == kSRegSizeInBytes) ? vreg(code).Get<float>(lane) in PrintVRegisterFPHelper()
670 : vreg(code).Get<double>(lane); in PrintVRegisterFPHelper()
2052 LogicVRegister(vreg(dst)).SetUint(kFormatD, 1, xreg(src)); in VisitFPIntegerConvert()
2055 set_xreg(dst, LogicVRegister(vreg(src)).Uint(kFormatD, 1)); in VisitFPIntegerConvert()
2220 SimVRegister& rd = vreg(instr->Rd()); in VisitFPDataProcessing1Source()
2221 SimVRegister& rn = vreg(instr->Rn()); in VisitFPDataProcessing1Source()
2230 case FABS_s: fabs_(kFormatS, vreg(fd), vreg(fn)); return; in VisitFPDataProcessing1Source()
2231 case FABS_d: fabs_(kFormatD, vreg(fd), vreg(fn)); return; in VisitFPDataProcessing1Source()
2232 case FNEG_s: fneg(kFormatS, vreg(fd), vreg(fn)); return; in VisitFPDataProcessing1Source()
2233 case FNEG_d: fneg(kFormatD, vreg(fd), vreg(fn)); return; in VisitFPDataProcessing1Source()
[all …]
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| D | simulator-a64.h | 969 T vreg(unsigned code) const { in vreg() function
982 return vreg<int8_t>(code); in breg()
986 return vreg<int16_t>(code); in hreg()
990 return vreg<float>(code); in sreg()
994 return vreg<uint32_t>(code); in sreg_bits()
998 return vreg<double>(code); in dreg()
1002 return vreg<uint64_t>(code); in dreg_bits()
1006 return vreg<qreg_t>(code); in qreg()
1012 T vreg(unsigned size, unsigned code) const { in vreg() function
1017 case kSRegSize: raw = vreg<uint32_t>(code); break; in vreg()
[all …]
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_wm_debug.c | 45 else if( value - c->vreg >= 0 && in brw_wm_print_value()
46 value - c->vreg < BRW_WM_MAX_VREG) in brw_wm_print_value()
47 printf("r%ld", (long) (value - c->vreg)); in brw_wm_print_value()
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| D | brw_wm.c | 285 void *vreg = c->vreg; in do_wm_prog() local
290 c->vreg = vreg; in do_wm_prog()
311 c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG); in do_wm_prog()
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| D | brw_wm_pass0.c | 52 memset(&c->vreg[c->nr_vreg], 0, sizeof(*c->vreg)); in get_value()
53 return &c->vreg[c->nr_vreg++]; in get_value()
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| D | brw_wm_pass2.c | 242 dst[i] = &c->vreg[c->nr_vreg++]; in alloc_contiguous_dest()
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| D | brw_wm.h | 225 struct brw_wm_value *vreg; member
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | quadint-return.ll | 17 ; CHECK: %X3<def> = COPY %vreg
18 ; CHECK-NEXT: %X4<def> = COPY %vreg
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| /external/llvm/test/CodeGen/ARM/ |
| D | misched-copy-arm.ll | 36 ; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1>
37 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]]
38 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-fast-isel-rem.ll | 7 ; CHECK-SSA: [[QUOTREG:%vreg[0-9]+]]<def> = SDIVWr
9 ; CHECK-SSA: {{%vreg[0-9]+}}<def> = MSUBWrrr [[QUOTREG]]
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| /external/v8/src/compiler/ |
| D | register-allocator.h | 353 int vreg = code()->NextVirtualRegister(); in GetVirtualRegister() local
354 if (vreg >= UnallocatedOperand::kMaxVirtualRegisters) { in GetVirtualRegister()
359 return vreg; in GetVirtualRegister()
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| /external/vixl/test/ |
| D | test-utils-a64.cc | 145 const VRegister& vreg) { in Equal128() argument
146 VIXL_ASSERT(vreg.Is128Bits()); in Equal128()
148 vec128_t result = core->qreg(vreg.code()); in Equal128()
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| /external/llvm/test/CodeGen/X86/ |
| D | early-ifcvt-crash.ll | 11 ; on an inline asm instruction is not a vreg def.
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| D | crash-O0.ll | 36 ; AX for the vreg defined in between and the compiler crashed.
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| D | misched-copy.ll | 13 ; CHECK-NEXT: MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp…
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| D | misched-new.ll | 58 ; Test that the DAG builder can handle an undef vreg on ExitSU.
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| /external/llvm/test/DebugInfo/ARM/ |
| D | selectiondag-deadcode.ll | 12 ; of the vreg holding %agg.result) the dbg_value becomes dangling
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 621 << getRegisterName(MI->getOperand(0).getReg(), AArch64::vreg) << ", "; in printInst()
627 << getRegisterName(MI->getOperand(ListOpNum + 1).getReg(), AArch64::vreg); in printInst()
929 O << getRegisterName(Reg, AArch64::vreg); in printVRegOperand()
1204 O << getRegisterName(Reg, AArch64::vreg) << LayoutSuffix; in printVectorList()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 766 void addLiveIn(unsigned Reg, unsigned vreg = 0) {
767 LiveIns.push_back(std::make_pair(Reg, vreg));
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 44 def vreg : RegAltNameIndex;
315 let SubRegIndices = [ssub], RegAltNameIndices = [vreg, vlist1] in {
350 let SubRegIndices = [dsub], RegAltNameIndices = [vreg, vlist1] in {
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| D | AArch64CallingConvention.td | 251 // vreg on entry, use it in RET & tail call generation; make that vreg def if we
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| /external/v8/src/mips/ |
| D | lithium-mips.cc | 622 int vreg = allocator_->GetVirtualRegister(); in TempRegister() local
625 vreg = 0; in TempRegister()
627 operand->set_virtual_register(vreg); in TempRegister()
635 int vreg = allocator_->GetVirtualRegister(); in TempDoubleRegister() local
638 vreg = 0; in TempDoubleRegister()
640 operand->set_virtual_register(vreg); in TempDoubleRegister()
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