1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DRM_MODE_H 20 #define _DRM_MODE_H 21 #include <linux/types.h> 22 #define DRM_DISPLAY_INFO_LEN 32 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define DRM_CONNECTOR_NAME_LEN 32 25 #define DRM_DISPLAY_MODE_LEN 32 26 #define DRM_PROP_NAME_LEN 32 27 #define DRM_MODE_TYPE_BUILTIN (1 << 0) 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 30 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 31 #define DRM_MODE_TYPE_PREFERRED (1 << 3) 32 #define DRM_MODE_TYPE_DEFAULT (1 << 4) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define DRM_MODE_TYPE_USERDEF (1 << 5) 35 #define DRM_MODE_TYPE_DRIVER (1 << 6) 36 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 37 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 40 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 41 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 42 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define DRM_MODE_FLAG_CSYNC (1 << 6) 45 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 46 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 47 #define DRM_MODE_FLAG_HSKEW (1 << 9) 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define DRM_MODE_FLAG_BCAST (1 << 10) 50 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 51 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 52 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 55 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 56 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 57 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 60 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 61 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 62 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 65 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 66 #define DRM_MODE_DPMS_ON 0 67 #define DRM_MODE_DPMS_STANDBY 1 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define DRM_MODE_DPMS_SUSPEND 2 70 #define DRM_MODE_DPMS_OFF 3 71 #define DRM_MODE_SCALE_NONE 0 72 #define DRM_MODE_SCALE_FULLSCREEN 1 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define DRM_MODE_SCALE_CENTER 2 75 #define DRM_MODE_SCALE_ASPECT 3 76 #define DRM_MODE_PICTURE_ASPECT_NONE 0 77 #define DRM_MODE_PICTURE_ASPECT_4_3 1 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define DRM_MODE_PICTURE_ASPECT_16_9 2 80 #define DRM_MODE_DITHERING_OFF 0 81 #define DRM_MODE_DITHERING_ON 1 82 #define DRM_MODE_DITHERING_AUTO 2 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define DRM_MODE_DIRTY_OFF 0 85 #define DRM_MODE_DIRTY_ON 1 86 #define DRM_MODE_DIRTY_ANNOTATE 2 87 struct drm_mode_modeinfo { 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 clock; 90 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 91 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 92 __u32 vrefresh; 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u32 flags; 95 __u32 type; 96 char name[DRM_DISPLAY_MODE_LEN]; 97 }; 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 struct drm_mode_card_res { 100 __u64 fb_id_ptr; 101 __u64 crtc_id_ptr; 102 __u64 connector_id_ptr; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u64 encoder_id_ptr; 105 __u32 count_fbs; 106 __u32 count_crtcs; 107 __u32 count_connectors; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u32 count_encoders; 110 __u32 min_width, max_width; 111 __u32 min_height, max_height; 112 }; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 struct drm_mode_crtc { 115 __u64 set_connectors_ptr; 116 __u32 count_connectors; 117 __u32 crtc_id; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __u32 fb_id; 120 __u32 x, y; 121 __u32 gamma_size; 122 __u32 mode_valid; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 struct drm_mode_modeinfo mode; 125 }; 126 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 127 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 struct drm_mode_set_plane { 130 __u32 plane_id; 131 __u32 crtc_id; 132 __u32 fb_id; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u32 flags; 135 __s32 crtc_x, crtc_y; 136 __u32 crtc_w, crtc_h; 137 __u32 src_x, src_y; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u32 src_h, src_w; 140 }; 141 struct drm_mode_get_plane { 142 __u32 plane_id; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 __u32 crtc_id; 145 __u32 fb_id; 146 __u32 possible_crtcs; 147 __u32 gamma_size; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 __u32 count_format_types; 150 __u64 format_type_ptr; 151 }; 152 struct drm_mode_get_plane_res { 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u64 plane_id_ptr; 155 __u32 count_planes; 156 }; 157 #define DRM_MODE_ENCODER_NONE 0 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define DRM_MODE_ENCODER_DAC 1 160 #define DRM_MODE_ENCODER_TMDS 2 161 #define DRM_MODE_ENCODER_LVDS 3 162 #define DRM_MODE_ENCODER_TVDAC 4 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define DRM_MODE_ENCODER_VIRTUAL 5 165 #define DRM_MODE_ENCODER_DSI 6 166 #define DRM_MODE_ENCODER_DPMST 7 167 struct drm_mode_get_encoder { 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 __u32 encoder_id; 170 __u32 encoder_type; 171 __u32 crtc_id; 172 __u32 possible_crtcs; 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 __u32 possible_clones; 175 }; 176 #define DRM_MODE_SUBCONNECTOR_Automatic 0 177 #define DRM_MODE_SUBCONNECTOR_Unknown 0 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 #define DRM_MODE_SUBCONNECTOR_DVID 3 180 #define DRM_MODE_SUBCONNECTOR_DVIA 4 181 #define DRM_MODE_SUBCONNECTOR_Composite 5 182 #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 #define DRM_MODE_SUBCONNECTOR_Component 8 185 #define DRM_MODE_SUBCONNECTOR_SCART 9 186 #define DRM_MODE_CONNECTOR_Unknown 0 187 #define DRM_MODE_CONNECTOR_VGA 1 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define DRM_MODE_CONNECTOR_DVII 2 190 #define DRM_MODE_CONNECTOR_DVID 3 191 #define DRM_MODE_CONNECTOR_DVIA 4 192 #define DRM_MODE_CONNECTOR_Composite 5 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 #define DRM_MODE_CONNECTOR_SVIDEO 6 195 #define DRM_MODE_CONNECTOR_LVDS 7 196 #define DRM_MODE_CONNECTOR_Component 8 197 #define DRM_MODE_CONNECTOR_9PinDIN 9 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 #define DRM_MODE_CONNECTOR_DisplayPort 10 200 #define DRM_MODE_CONNECTOR_HDMIA 11 201 #define DRM_MODE_CONNECTOR_HDMIB 12 202 #define DRM_MODE_CONNECTOR_TV 13 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define DRM_MODE_CONNECTOR_eDP 14 205 #define DRM_MODE_CONNECTOR_VIRTUAL 15 206 #define DRM_MODE_CONNECTOR_DSI 16 207 struct drm_mode_get_connector { 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 __u64 encoders_ptr; 210 __u64 modes_ptr; 211 __u64 props_ptr; 212 __u64 prop_values_ptr; 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 __u32 count_modes; 215 __u32 count_props; 216 __u32 count_encoders; 217 __u32 encoder_id; 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 __u32 connector_id; 220 __u32 connector_type; 221 __u32 connector_type_id; 222 __u32 connection; 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 __u32 mm_width, mm_height; 225 __u32 subpixel; 226 __u32 pad; 227 }; 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 #define DRM_MODE_PROP_PENDING (1 << 0) 230 #define DRM_MODE_PROP_RANGE (1 << 1) 231 #define DRM_MODE_PROP_IMMUTABLE (1 << 2) 232 #define DRM_MODE_PROP_ENUM (1 << 3) 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 #define DRM_MODE_PROP_BLOB (1 << 4) 235 #define DRM_MODE_PROP_BITMASK (1 << 5) 236 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 237 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 240 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 241 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 242 struct drm_mode_property_enum { 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 __u64 value; 245 char name[DRM_PROP_NAME_LEN]; 246 }; 247 struct drm_mode_get_property { 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u64 values_ptr; 250 __u64 enum_blob_ptr; 251 __u32 prop_id; 252 __u32 flags; 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 char name[DRM_PROP_NAME_LEN]; 255 __u32 count_values; 256 __u32 count_enum_blobs; 257 }; 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 struct drm_mode_connector_set_property { 260 __u64 value; 261 __u32 prop_id; 262 __u32 connector_id; 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 }; 265 struct drm_mode_obj_get_properties { 266 __u64 props_ptr; 267 __u64 prop_values_ptr; 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 __u32 count_props; 270 __u32 obj_id; 271 __u32 obj_type; 272 }; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 struct drm_mode_obj_set_property { 275 __u64 value; 276 __u32 prop_id; 277 __u32 obj_id; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 __u32 obj_type; 280 }; 281 struct drm_mode_get_blob { 282 __u32 blob_id; 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 __u32 length; 285 __u64 data; 286 }; 287 struct drm_mode_fb_cmd { 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 __u32 fb_id; 290 __u32 width, height; 291 __u32 pitch; 292 __u32 bpp; 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 __u32 depth; 295 __u32 handle; 296 }; 297 #define DRM_MODE_FB_INTERLACED (1 << 0) 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 struct drm_mode_fb_cmd2 { 300 __u32 fb_id; 301 __u32 width, height; 302 __u32 pixel_format; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 __u32 flags; 305 __u32 handles[4]; 306 __u32 pitches[4]; 307 __u32 offsets[4]; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 }; 310 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 311 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 312 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 315 struct drm_mode_fb_dirty_cmd { 316 __u32 fb_id; 317 __u32 flags; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 __u32 color; 320 __u32 num_clips; 321 __u64 clips_ptr; 322 }; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 struct drm_mode_mode_cmd { 325 __u32 connector_id; 326 struct drm_mode_modeinfo mode; 327 }; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 #define DRM_MODE_CURSOR_BO 0x01 330 #define DRM_MODE_CURSOR_MOVE 0x02 331 #define DRM_MODE_CURSOR_FLAGS 0x03 332 struct drm_mode_cursor { 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __u32 flags; 335 __u32 crtc_id; 336 __s32 x; 337 __s32 y; 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 __u32 width; 340 __u32 height; 341 __u32 handle; 342 }; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 struct drm_mode_cursor2 { 345 __u32 flags; 346 __u32 crtc_id; 347 __s32 x; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 __s32 y; 350 __u32 width; 351 __u32 height; 352 __u32 handle; 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 __s32 hot_x; 355 __s32 hot_y; 356 }; 357 struct drm_mode_crtc_lut { 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 __u32 crtc_id; 360 __u32 gamma_size; 361 __u64 red; 362 __u64 green; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 __u64 blue; 365 }; 366 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 367 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC) 370 struct drm_mode_crtc_page_flip { 371 __u32 crtc_id; 372 __u32 fb_id; 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 __u32 flags; 375 __u32 reserved; 376 __u64 user_data; 377 }; 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 struct drm_mode_create_dumb { 380 uint32_t height; 381 uint32_t width; 382 uint32_t bpp; 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 uint32_t flags; 385 uint32_t handle; 386 uint32_t pitch; 387 uint64_t size; 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 }; 390 struct drm_mode_map_dumb { 391 __u32 handle; 392 __u32 pad; 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 __u64 offset; 395 }; 396 struct drm_mode_destroy_dumb { 397 uint32_t handle; 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 }; 400 #endif 401