1//===-- HexagoSelectCCInfo.td - Selectcc mappings ----------*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10
11//
12// selectcc mappings.
13//
14def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
15                          IntRegs:$fval, SETEQ)),
16      (i32 (MUX_rr (i1 (CMPEQrr IntRegs:$lhs, IntRegs:$rhs)),
17                   IntRegs:$tval, IntRegs:$fval))>;
18
19def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
20                          IntRegs:$fval, SETNE)),
21      (i32 (MUX_rr (i1 (NOT_p (CMPEQrr IntRegs:$lhs, IntRegs:$rhs))),
22                   IntRegs:$tval, IntRegs:$fval))>;
23
24def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
25                          IntRegs:$fval, SETGT)),
26      (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, IntRegs:$rhs)),
27                   IntRegs:$tval, IntRegs:$fval))>;
28
29def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
30                          IntRegs:$fval, SETUGT)),
31      (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs)),
32                   IntRegs:$tval, IntRegs:$fval))>;
33
34
35
36def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
37                          IntRegs:$fval, SETULT)),
38      (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs,
39                                         (ADD_ri IntRegs:$rhs, -1)))),
40                   IntRegs:$tval, IntRegs:$fval))>;
41
42def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
43                          IntRegs:$fval, SETLT)),
44      (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs,
45                                        (ADD_ri IntRegs:$rhs, -1)))),
46                   IntRegs:$tval, IntRegs:$fval))>;
47
48def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
49                          IntRegs:$fval, SETLE)),
50      (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, IntRegs:$rhs))),
51                   IntRegs:$tval, IntRegs:$fval))>;
52
53def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
54                          IntRegs:$fval, SETULE)),
55      (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs))),
56                   IntRegs:$tval, IntRegs:$fval))>;
57
58
59//
60// selectcc mappings for greater-equal-to Rs => greater-than Rs-1.
61//
62def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
63                          IntRegs:$fval, SETGE)),
64      (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))),
65                   IntRegs:$tval, IntRegs:$fval))>;
66
67def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
68                          IntRegs:$fval, SETUGE)),
69      (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))),
70                   IntRegs:$tval, IntRegs:$fval))>;
71
72
73
74//
75// selectcc mappings for predicate comparisons.
76//
77// Convert Rd = selectcc(p0, p1, true_val, false_val, SETEQ) into:
78//  pt = not(p1 xor p2)
79//  Rd = mux(pt, true_val, false_val)
80// and similarly for SETNE
81//
82def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval,
83                          IntRegs:$fval, SETNE)),
84      (i32 (MUX_rr (i1 (XOR_pp PredRegs:$lhs, PredRegs:$rhs)), IntRegs:$tval,
85                   IntRegs:$fval))>;
86
87def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval,
88                          IntRegs:$fval, SETEQ)),
89      (i32 (MUX_rr (i1 (NOT_p (XOR_pp PredRegs:$lhs, PredRegs:$rhs))),
90                   IntRegs:$tval, IntRegs:$fval))>;
91
92
93//
94// selectcc mappings for 64-bit operands are messy. Hexagon does not have a
95// MUX64 o, use this:
96// selectcc(Rss, Rdd, tval, fval, cond) ->
97//   combine(mux(cmp_cond(Rss, Rdd), tval.hi, fval.hi),
98//           mux(cmp_cond(Rss, Rdd), tval.lo, fval.lo))
99
100// setgt-64.
101def : Pat<(i64 (selectcc DoubleRegs:$lhs, DoubleRegs:$rhs, DoubleRegs:$tval,
102                         DoubleRegs:$fval, SETGT)),
103      (COMBINE_rr (MUX_rr (CMPGT64rr DoubleRegs:$lhs, DoubleRegs:$rhs),
104                           (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
105                           (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
106                   (MUX_rr (CMPGT64rr DoubleRegs:$lhs, DoubleRegs:$rhs),
107                           (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
108                           (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
109
110
111// setlt-64 -> setgt-64.
112def : Pat<(i64 (selectcc DoubleRegs:$lhs, DoubleRegs:$rhs, DoubleRegs:$tval,
113                         DoubleRegs:$fval, SETLT)),
114      (COMBINE_rr (MUX_rr (CMPGT64rr DoubleRegs:$lhs,
115                                     (ADD64_rr DoubleRegs:$rhs, (TFRI64 -1))),
116                           (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
117                           (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
118                   (MUX_rr (CMPGT64rr DoubleRegs:$lhs,
119                                      (ADD64_rr DoubleRegs:$rhs, (TFRI64 -1))),
120                           (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
121                           (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
122