1 //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Subclass of MipsTargetLowering specialized for mips16.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
15 #define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
16 
17 #include "MipsISelLowering.h"
18 
19 namespace llvm {
20   class Mips16TargetLowering : public MipsTargetLowering  {
21   public:
22     explicit Mips16TargetLowering(const MipsTargetMachine &TM,
23                                   const MipsSubtarget &STI);
24 
25     bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
26                                         unsigned Align,
27                                         bool *Fast) const override;
28 
29     MachineBasicBlock *
30     EmitInstrWithCustomInserter(MachineInstr *MI,
31                                 MachineBasicBlock *MBB) const override;
32 
33   private:
34     bool isEligibleForTailCallOptimization(
35         const CCState &CCInfo, unsigned NextStackOffset,
36         const MipsFunctionInfo &FI) const override;
37 
38     void setMips16HardFloatLibCalls();
39 
40     unsigned int
41       getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
42 
43     const char *getMips16HelperFunction
44       (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
45 
46     void
47     getOpndList(SmallVectorImpl<SDValue> &Ops,
48                 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
49                 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
50                 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
51                 SDValue Chain) const override;
52 
53     MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
54                                  MachineBasicBlock *BB) const;
55 
56     MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
57                                    MachineInstr *MI,
58                                    MachineBasicBlock *BB) const;
59 
60     MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
61                                   MachineInstr *MI,
62                                   MachineBasicBlock *BB) const;
63 
64     MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
65                                            MachineInstr *MI,
66                                            MachineBasicBlock *BB) const;
67 
68     MachineBasicBlock *emitFEXT_T8I8I16_ins(
69       unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
70       MachineInstr *MI,  MachineBasicBlock *BB) const;
71 
72     MachineBasicBlock *emitFEXT_CCRX16_ins(
73       unsigned SltOpc,
74       MachineInstr *MI,  MachineBasicBlock *BB) const;
75 
76     MachineBasicBlock *emitFEXT_CCRXI16_ins(
77       unsigned SltiOpc, unsigned SltiXOpc,
78       MachineInstr *MI,  MachineBasicBlock *BB )const;
79   };
80 }
81 
82 #endif
83