1 //===--------------------- AMDGPUFrameLowering.h ----------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief Interface to describe a layout of a stack frame on a AMDIL target
12 /// machine.
13 //
14 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUFRAMELOWERING_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUFRAMELOWERING_H
17 
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/Target/TargetFrameLowering.h"
20 
21 namespace llvm {
22 
23 /// \brief Information about the stack frame layout on the AMDGPU targets.
24 ///
25 /// It holds the direction of the stack growth, the known stack alignment on
26 /// entry to each function, and the offset to the locals area.
27 /// See TargetFrameInfo for more comments.
28 class AMDGPUFrameLowering : public TargetFrameLowering {
29 public:
30   AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
31                       unsigned TransAl = 1);
32   virtual ~AMDGPUFrameLowering();
33 
34   /// \returns The number of 32-bit sub-registers that are used when storing
35   /// values to the stack.
36   unsigned getStackWidth(const MachineFunction &MF) const;
37   int getFrameIndexOffset(const MachineFunction &MF, int FI) const override;
38   const SpillSlot *
39     getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
40   void emitPrologue(MachineFunction &MF) const override;
41   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
42   bool hasFP(const MachineFunction &MF) const override;
43 };
44 } // namespace llvm
45 #endif
46