1; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2
3; DAGCombine to transform a conversion of an extract_vector_elt to an
4; extract_vector_elt of a conversion, which saves a round trip of copies
5; of the value to a GPR and back to and FPR.
6; rdar://11855286
7define double @foo0(<2 x i64> %a) nounwind {
8; CHECK:  scvtf.2d  [[REG:v[0-9]+]], v0, #9
9; CHECK-NEXT:  mov  d0, [[REG]][1]
10  %vecext = extractelement <2 x i64> %a, i32 1
11  %fcvt_n = tail call double @llvm.aarch64.neon.vcvtfxs2fp.f64.i64(i64 %vecext, i32 9)
12  ret double %fcvt_n
13}
14
15declare double @llvm.aarch64.neon.vcvtfxs2fp.f64.i64(i64, i32) nounwind readnone
16