1; RUN: llc -mtriple=aarch64-apple-ios7.0 -disable-block-placement -aarch64-tbz-offset-bits=4 -o - %s | FileCheck %s
2define i32 @test_asm_length(i32 %in) {
3; CHECK-LABEL: test_asm_length:
4
5  ; It would be more natural to use just one "tbnz %false" here, but if the
6  ; number of instructions in the asm is counted reasonably, that block is out
7  ; of the limited range we gave tbz. So branch relaxation has to invert the
8  ; condition.
9; CHECK:     tbz w0, #0, [[TRUE:LBB[0-9]+_[0-9]+]]
10; CHECK:     b [[FALSE:LBB[0-9]+_[0-9]+]]
11
12; CHECK: [[TRUE]]:
13; CHECK:     orr w0, wzr, #0x4
14; CHECK:     nop
15; CHECK:     nop
16; CHECK:     nop
17; CHECK:     nop
18; CHECK:     nop
19; CHECK:     nop
20; CHECK:     ret
21
22; CHECK: [[FALSE]]:
23; CHECK:     ret
24
25  %val = and i32 %in, 1
26  %tst = icmp eq i32 %val, 0
27  br i1 %tst, label %true, label %false
28
29true:
30  call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()
31  ret i32 4
32
33false:
34  ret i32 0
35}
36