1; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ 2; RUN: < %s | FileCheck %s 3; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ 4; RUN: < %s | FileCheck %s 5 6@ijk = external global i32 7 8; Function Attrs: nounwind 9define void @si2_1() #0 { 10entry: 11 store i32 32767, i32* @ijk, align 4 12; CHECK: .ent si2_1 13; CHECK: addiu $[[REG1:[0-9]+]], $zero, 32767 14; CHECK: lw $[[REG2:[0-9]+]], %got(ijk)(${{[0-9]+}}) 15; CHECK: sw $[[REG1]], 0($[[REG2]]) 16 17 ret void 18} 19 20; Function Attrs: nounwind 21define void @si2_2() #0 { 22entry: 23 store i32 -32768, i32* @ijk, align 4 24; CHECK: .ent si2_2 25; CHECK: addiu $[[REG1:[0-9]+]], $zero, -32768 26; CHECK: lw $[[REG2:[0-9]+]], %got(ijk)(${{[0-9]+}}) 27; CHECK: sw $[[REG1]], 0($[[REG2]]) 28 ret void 29} 30 31; Function Attrs: nounwind 32define void @ui2_1() #0 { 33entry: 34 store i32 65535, i32* @ijk, align 4 35; CHECK: .ent ui2_1 36; CHECK: ori $[[REG1:[0-9]+]], $zero, 65535 37; CHECK: lw $[[REG2:[0-9]+]], %got(ijk)(${{[0-9]+}}) 38; CHECK: sw $[[REG1]], 0($[[REG2]]) 39 ret void 40} 41 42; Function Attrs: nounwind 43define void @ui4_1() #0 { 44entry: 45 store i32 983040, i32* @ijk, align 4 46; CHECK: .ent ui4_1 47; CHECK: lui $[[REG1:[0-9]+]], 15 48; CHECK: lw $[[REG2:[0-9]+]], %got(ijk)(${{[0-9]+}}) 49; CHECK: sw $[[REG1]], 0($[[REG2]]) 50 ret void 51} 52 53; Function Attrs: nounwind 54define void @ui4_2() #0 { 55entry: 56 store i32 719566, i32* @ijk, align 4 57; CHECK: .ent ui4_2 58; CHECK: lui $[[REG1:[0-9]+]], 10 59; CHECK: ori $[[REG1]], $[[REG1]], 64206 60; CHECK: lw $[[REG2:[0-9]+]], %got(ijk)(${{[0-9]+}}) 61; CHECK: sw $[[REG1]], 0($[[REG2]]) 62 ret void 63} 64 65attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 66 67 68